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* virgl/vtest: deprecate protocol version 1Gurchetan Singh2019-02-274-43/+23
| | | | | | | | | | | | | | | | | This is a partial revert of 9d81cd ("virgl: Pass resource size and transfer offsets"). The adjustments made in the client code means there's various mismatches when transfering data. Let's fallback to protocol version 0 and deprecate protocol version 1. We can still use the protocol version 1 slots for a shared memory transfer mechanism later. Fixes: dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.*_renderbuffer Reviewed-By: Gert Wollny <[email protected]>
* iris: add Android buildTapani Pälli2019-02-212-0/+43
| | | | | | | | | | | | | | | Note that at least following additional libs/components require changes since they refer to BOARD_GPU_DRIVERS variable which is used to select the driver: - mixins - minigbm - libdrm - drm_gralloc v2: (feedback by Gustaw Smolarczyk) Fix trailing \ in a few cases Signed-off-by: Tapani Pälli <[email protected]>
* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-213-0/+94
| | | | | | | | | | | | | | | This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
* virgl: make winsys modifications for encoded transfersGurchetan Singh2019-02-153-3/+16
| | | | | | | | | | | | | The idea is to have two command buffers: 1) One for transfers 2) One for commands, which can include transfers At flush time, (2) will be filled. Otherwise, (1) will be used to submit transfers if there are enough of them. v2: Pass size directly to cmd_buf_create (@gerddie) Reviewed-by: Gert Wollny <[email protected]>
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-146-6/+6
| | | | | | | | | There was an issue recently caused by the system header being included by mistake, so let's just get rid of this include path and always explicitly #include "drm-uapi/FOO.h" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* winsys/amdgpu: cs_check_space sets the minimum IB size for future IBsMarek Olšák2019-02-112-2/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: clean up IB buffer size computationMarek Olšák2019-02-111-8/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: remove occurence of INDIRECT_BUFFER_CONSTMarek Olšák2019-02-111-2/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: use a separate fence list for syncobjsMarek Olšák2019-02-112-17/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: unify fence list codeMarek Olšák2019-02-112-59/+42
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: don't drop manually added fence dependenciesMarek Olšák2019-02-111-2/+0
| | | | | | | wow, it's hard to believe that fence and syncobjs dependencies were ignored. Cc: 18.3 19.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium-xlib: query MIT-SHM before using it.Bart Oldeman2019-02-051-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | When Mesa is compiled for gallium-xlib using e.g. ./configure --enable-glx=gallium-xlib --disable-dri --disable-gbm -disable-egl and is used by an X server (usually remotely via SSH X11 forwarding) that does not support MIT-SHM such as XMing or MobaXterm, OpenGL clients report error messages such as Xlib: extension "MIT-SHM" missing on display "localhost:11.0". ad infinitum. The reason is that the code in src/gallium/winsys/sw/xlib uses MIT-SHM without checking for its existence, unlike the code in src/glx/drisw_glx.c and src/mesa/drivers/x11/xm_api.c. I copied the same check using XQueryExtension, and tested with glxgears on MobaXterm. This issue was reported before here: https://lists.freedesktop.org/archives/mesa-users/2016-July/001183.html Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Cc: <[email protected]>
* panfrost: Initial stub for Panfrost driverAlyssa Rosenzweig2019-02-058-0/+204
| | | | | | | | | | | | | This patch adds an initial stub for the Gallium driver, containing simple screen functions and the majority of the driver headers but no actual functionality. It further adds the winsys glue for linking in this stub driver via kmsro on Rockchip/Amlogic boards. Signed-off-by: Alyssa Rosenzweig <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Rob Clark <[email protected]> Acked-by: Eric Anholt <[email protected]> Acked-by: Emil Velikov <[email protected]>
* winsys/amdgpu: remove amdgpu_drm.h definitionsMarek Olšák2019-01-301-8/+0
| | | | trivial
* kmsro: Add freedreno renderonly supportJonathan Marek2019-01-283-0/+20
| | | | Signed-off-by: Jonathan Marek <[email protected]>
* Switch imx to kmsro and remove the imx winsysRob Herring2019-01-286-195/+0
| | | | | | | The kmsro winsys is equivalent to the imx winsys, so we can switch to it and remove the imx one. Signed-off-by: Rob Herring <[email protected]>
* kmsro: Add etnaviv renderonly supportRob Herring2019-01-283-11/+44
| | | | | | | | Enable using etnaviv for KMS renderonly. This still needs KMS driver name mapping to kmsro to be used automatically. Acked-by: Eric Anholt <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* pl111: Rename the pl111 driver to "kmsro".Eric Anholt2019-01-287-19/+19
| | | | | | | | | | | | The vc4 driver can do prime sharing to many different KMS-only devices, such as the various tinydrm drivers for SPI-attached displays. Rename the driver away from "pl111" to represent what it will actually support: various sorts of KMS displays with the renderonly layer used to attach a GPU. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Acked-by: Emil Velikov <[email protected]>
* freedreno: add renderonly scanoutJonathan Marek2019-01-262-3/+4
| | | | | | | | | | This allows creating a fd_screen with a renderonly object which will be used to allocated scanout resources. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [slight tweak to fix uninitialized 'prsc' in debug print] Signed-off-by: Rob Clark <[email protected]>
* gallium: use put image shm2 path (v2)Dave Airlie2019-01-251-4/+9
| | | | | | | | | | | This fixes the drisw paths to use the new shm2 interface, so that we don't trigger the X server overflow checks when the x offset is non-zero. This just hides the versioning in drisw, and either passes the src_x or adds the offset fixup for the fallback path. Cc: <[email protected]> Reviewed-by: Adam Jackson <[email protected]>
* winsys/amdgpu: rename rfence, rsrc, rdst -> afence, asrc, adstMarek Olšák2019-01-222-23/+23
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: use the new BO list APIMarek Olšák2019-01-221-49/+25
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* vc4: Don't leak the GPU fd for renderonly usage.Eric Anholt2019-01-161-1/+1
| | | | | | | | Noticed while debugging V3D -- the ro->gpu_fd was freshly opened in ro setup, and it needs to stay open until screen close (since it may be used by renderonly) and should be the same one used by the vc4 screen. Fixes: 7029ec05e2c7 ("gallium: Add renderonly-based support for pl111+vc4.")
* v3d: Don't leak the GPU fd for renderonly usage.Eric Anholt2019-01-161-1/+1
| | | | | | | | | | The CTS was running out of fds, because of the ro->gpu_fd never being closed. ro->gpu_fd should match the screen (in case the caller of v3d_drm_screen_create_renderonly() has a scanout_for_resource() that uses gpu_fd) and the screen is expected to close its fd at the end, fixing the resource leak. Fixes: e113b21cb779 ("v3d: Add renderonly support.")
* freedreno: Move register constant files to src/freedreno.Bas Nieuwenhuizen2019-01-081-0/+1
| | | | | | | | This way they can be shared. Build tested with meson, but not too sure on the autotools stuff though. Reviewed-by: Dylan Baker <[email protected]> Acked-by: Rob Clark <[email protected]>
* virgl/vtest: Use default socket name from protocol headerJakob Bornecrantz2019-01-031-3/+1
| | | | | | | | No functional change as the socket name is the same, just removing the double definition of the path. Reviewed-by: Gurchetan Singh <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* virgl/vtest: fix front buffer flush with protocol version 0.Dave Airlie2018-12-281-1/+1
| | | | | | | | Older versions of virglrenderer before 33da7361aec486290df0aec4ad8dfa8ff6adde2c in vtest mode, misrender gears. Fixes: 9d81cd8e7c (virgl: Pass resource size and transfer offsets) Reviewed-By: Gert Wollny <[email protected]>
* winsys/amdgpu: Pull in LLVM CFLAGSMichel Dänzer2018-12-192-1/+2
| | | | | | | | | Fixes build failure if the LLVM headers aren't in a standard include directory. Fixes: ec22dd34c88f "radeonsi: move SI_FORCE_FAMILY functionality to winsys" Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move SI_FORCE_FAMILY functionality to winsysNicolai Hähnle2018-12-191-0/+36
| | | | | | | This helps some debugging cases by initializing addrlib with slightly more appropriate settings. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Constify drisw_loader_funcs structMichal Srb2018-12-052-3/+3
| | | | | | | | The content is not expected to change. Cc: [email protected] Signed-off-by: Michal Srb <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Revert "winsys/amdgpu: overallocate buffers for faster address translation ↵Marek Olšák2018-11-291-24/+0
| | | | | | | | on Gfx9" I didn't mean to push this. I don't think it makes any difference. This reverts commit f737fe00a047ae1ae9ec4e15a4ea8b578389f2f6.
* amd/addrlib: update Mesa's copy of addrlibNicolai Hähnle2018-11-291-1/+1
| | | | | | | | Update to the internal master as of 2018-11-15. This has a lot of gratuitous whitespace change, but on the plus side it's built using the same tooling that's used for AMDVLK, which should help going forward.
* winsys/svga: Fix a memory leakThomas Hellstrom2018-11-291-0/+2
| | | | | | | | | The ioctl.cap_3d member was never freed. Cc: [email protected] Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* winsys/amdgpu: add support for allocating GDS and OA resourcesMarek Olšák2018-11-281-22/+33
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: use optimal VM alignment for CPU allocationsMarek Olšák2018-11-281-2/+4
| | | | Acked-by: Christian König <[email protected]>
* winsys/amdgpu: use optimal VM alignment for imported buffersMarek Olšák2018-11-281-20/+29
| | | | | | Window system buffers didn't use the optimal alignment. Acked-by: Christian König <[email protected]>
* winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handleMarek Olšák2018-11-283-2/+5
| | | | Acked-by: Christian König <[email protected]>
* winsys/amdgpu: overallocate buffers for faster address translation on Gfx9Marek Olšák2018-11-281-0/+24
| | | | | | | | Sadly, the 3 games I tested (DeusEx:MD, DiRT Rally, DOTA 2) are unaffected by the overallocation, because I guess their buffers don't fall into the small range below a power-of-two size. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: increase the VM alignment to the MSB of the size for Gfx9Marek Olšák2018-11-281-1/+11
| | | | | Reviewed-by: Christian König <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: use >= instead of > for VM address alignmentMarek Olšák2018-11-281-1/+1
| | | | | Reviewed-by: Christian König <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: clean up code around BO VM alignmentMarek Olšák2018-11-281-2/+7
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: optimize slab allocation for 2 MB amdgpu page tablesMarek Olšák2018-11-283-2/+10
| | | | | | | | | | | | | | | - the slab buffer size increased from 128 KB to 2 MB (PTE fragment size) - the max suballocated buffer size increased from 64 KB to 256 KB, this increases memory usage because it wastes memory - the number of suballocators increased from 1 to 3 and they are layered on top of each other to minimize unused space in slabs The final increase in memory usage is: DeusEx:MD: 1.8% DOTA 2: 1.75% DiRT Rally: 0.2% The kernel driver will also receive fewer buffers.
* radeonsi: generalize the slab allocator code to allow layered slab allocatorsMarek Olšák2018-11-283-24/+86
| | | | | There is no change in behavior. It just makes it easier to change the number of slab allocators.
* winsys/amdgpu: always reclaim/release slabs if there is not enough memoryMarek Olšák2018-11-281-7/+13
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* winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2018-11-282-33/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver-private transfer flag RADEON_TRANSFER_TEMPORARY that specifies whether the caller will use buffer_unmap or not. The default behavior is set to permanent maps, because that's what drivers do for Gallium buffer maps. This should eliminate the need for hacks in libdrm. Assertions are added to catch when the buffer_unmap calls don't match the (temporary) buffer_map calls. I did my best to update r600 for consistency (r300 needs no changes because it never calls buffer_unmap), even though the radeon winsys ignores the new flag. As an added bonus, this should actually improve the performance of the normal fast path, because we no longer call into libdrm at all after the first map, and there's one less atomic in the winsys itself (there are now no atomics left in the UNSYNCHRONIZED fast path). Cc: Leo Liu <[email protected]> v2: - remove comment about visible VRAM (Marek) - don't rely on amdgpu_bo_cpu_map doing an atomic write Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add amdgpu_winsys_bo::lockNicolai Hähnle2018-11-283-13/+20
| | | | | | | We'll use it in the upcoming mapping change. Sparse buffers have always had one. Reviewed-by: Marek Olšák <[email protected]>
* virgl,vtest: Initialize return valueGert Wollny2018-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Avoids: Conditional jump or move depends on uninitialised value(s) at 0x9E2B39F: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:379) by 0x9E2725F: virgl_buffer_create (virgl_buffer.c:169) by 0x9E246D5: virgl_resource_create (virgl_resource.c:60) by 0xA0C1B9F: bufferobj_data (st_cb_bufferobjects.c:344) by 0xA0C1B9F: st_bufferobj_data (st_cb_bufferobjects.c:390) by 0x9F4ACE3: vbo_use_buffer_objects (vbo_exec_api.c:1136) by 0xA0C68C3: st_create_context_priv (st_context.c:416) by 0xA0C707A: st_create_context (st_context.c:598) by 0x9F81C6B: st_api_create_context (st_manager.c:918) by 0x9BBE591: dri_create_context (dri_context.c:161) by 0x9BB6931: driCreateContextAttribs (dri_util.c:473) by 0x4E97A44: drisw_create_context_attribs (drisw_glx.c:630) by 0x4E7C591: glXCreateContextAttribsARB (create_context.c:78) Uninitialised value was created by a stack allocation at 0x9E2B249: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:342) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Robert Foss <[email protected]>
* v3d: Add renderonly support.Eric Anholt2018-11-272-1/+9
| | | | | | I've been using this with the kmsro series to test v3d on VKMS without my old KMS hack in the v3d kernel driver. KMSRO still needs some cleanup, but v3d RO support seems reasonable.
* freedreno: move drm to common locationRob Clark2018-11-272-0/+2
| | | | | | | | So that we can re-use at least parts of it for vulkan driver, and so that we can move ir3 to a common location (which uses fd_bo to allocate storage for shaders) Signed-off-by: Rob Clark <[email protected]>
* winsys/amdgpu: fix a device handle leak in amdgpu_winsys_createMarek Olšák2018-11-231-0/+6
| | | | | Cc: 18.2 18.3 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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