summaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys
Commit message (Expand)AuthorAgeFilesLines
* ac: rename SI-CIK-VI to GFX6-GFX7-GFX8Marek Olšák2019-05-155-24/+24
* v3d: Use driconf to expose non-MSAA texture limits for Xorg.Eric Anholt2019-05-136-15/+25
* winsys/amdgpu: add VCN JPEG to no user fence groupLeo Liu2019-05-101-1/+2
* virgl: export resource_is_busy from winsysChia-I Wu2019-05-062-11/+14
* svga: move host logging to winsysCharmaine Lee2019-05-025-0/+495
* winsys/svga: Don't abort on EBUSY errors from execbufferThomas Hellstrom2019-05-021-1/+3
* winsys/svga: Update the drm interface fileThomas Hellstrom2019-05-022-174/+188
* winsys/svga: Enable the transfer_from_buffer GPU command for vgpu10Thomas Hellstrom2019-05-021-0/+1
* winsys/svga: Add an environment variable to force host-backed operationThomas Hellstrom2019-05-021-6/+11
* winsys/svga/drm: Include sys/types.hKhem Raj2019-04-301-0/+1
* vc4: Fall back to renderonly if the vc4 driver doesn't have v3d.Eric Anholt2019-04-262-3/+35
* kmsro: Add support for V3D.Eric Anholt2019-04-262-0/+16
* virgl/drm: insert correct handles into the table. (v3)Dave Airlie2019-04-251-1/+4
* virgl/drm: handle flink name better.Dave Airlie2019-04-252-20/+11
* virgl/drm: cleanup buffer from handle creation (v2)Dave Airlie2019-04-252-15/+13
* winsys/amdgpu: clean up and remove nonsensical assertionMarek Olšák2019-04-231-2/+1
* winsys/amdgpu: enable chaining for compute IBsMarek Olšák2019-04-231-6/+6
* winsys/amdgpu: reorder chunks, make BO_HANDLES first, IB and FENCE lastMarek Olšák2019-04-231-19/+17
* winsys/amdgpu: make IBs writable and expose their addressMarek Olšák2019-04-231-1/+3
* ac: add radeon_info::marketing_name, replacing the winsys callbackMarek Olšák2019-04-231-7/+0
* iris: Add mechanism for iris-specific driconf optionsKenneth Graunke2019-04-222-3/+5
* lima: add Android buildIcenowy Zheng2019-04-211-0/+32
* virgl/vtest: bump up protocol version + support encoded transfersGurchetan Singh2019-04-183-3/+12
* virgl/vtest: wait after issuing a transfer getGurchetan Singh2019-04-181-2/+3
* virgl/vtest: modify sending and receiving data for shared memoryGurchetan Singh2019-04-181-4/+35
* virgl/vtest: receive and handle shared memory fdGurchetan Singh2019-04-182-7/+55
* virgl/vtest: plumb support for shared memoryGurchetan Singh2019-04-183-6/+10
* virgl/vtest: add utilities for receiving fdsGurchetan Singh2019-04-181-0/+43
* virgl/vtest: execute a transfer_get when flushing the front bufferGurchetan Singh2019-04-181-22/+21
* winsys/amdgpu: don't set GTT with GDS & OA placements on APUsMarek Olšák2019-04-161-9/+11
* virgl: fix fence fd version checkChia-I Wu2019-04-151-2/+2
* virgl: introduce virgl_drm_fenceChia-I Wu2019-04-152-45/+115
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-28/+42
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-153-12/+25
* Delete autotoolsDylan Baker2019-04-1519-606/+0
* ac: Move has_local_buffers disable to radeonsi.Bas Nieuwenhuizen2019-04-151-0/+4
* kmsro: Add lima renderonly supportRob Herring2019-04-112-0/+14
* gallium: add lima driverQiang Yu2019-04-113-0/+188
* radeonsi: add support for displayable DCC for 1 RB chipsMarek Olšák2019-04-041-0/+8
* panfrost: Remove support for legacy kernelsAlyssa Rosenzweig2019-04-033-14/+5
* virgl: close drm fd when destroying virgl screen.Lepton Wu2019-04-021-0/+1
* virgl: use uint16_t mask instead of separate booleansGurchetan Singh2019-03-132-80/+83
* gallium/winsys/kms: fix incomplete type compilation failureBrian Paul2019-03-111-0/+1
* drisw: fix incomplete type compilation failureBrian Paul2019-03-111-0/+1
* winsys/svga: use new pb_usage_flags enum typeBrian Paul2019-03-083-6/+26
* virgl/vtest: deprecate protocol version 1Gurchetan Singh2019-02-274-43/+23
* iris: add Android buildTapani Pälli2019-02-212-0/+43
* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-213-0/+94
* virgl: make winsys modifications for encoded transfersGurchetan Singh2019-02-153-3/+16
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-146-6/+6
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 05:17:49 +0000