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* freedreno: add renderonly scanoutJonathan Marek2019-01-262-3/+4
* gallium: use put image shm2 path (v2)Dave Airlie2019-01-251-4/+9
* winsys/amdgpu: rename rfence, rsrc, rdst -> afence, asrc, adstMarek Olšák2019-01-222-23/+23
* winsys/amdgpu: use the new BO list APIMarek Olšák2019-01-221-49/+25
* vc4: Don't leak the GPU fd for renderonly usage.Eric Anholt2019-01-161-1/+1
* v3d: Don't leak the GPU fd for renderonly usage.Eric Anholt2019-01-161-1/+1
* freedreno: Move register constant files to src/freedreno.Bas Nieuwenhuizen2019-01-081-0/+1
* virgl/vtest: Use default socket name from protocol headerJakob Bornecrantz2019-01-031-3/+1
* virgl/vtest: fix front buffer flush with protocol version 0.Dave Airlie2018-12-281-1/+1
* winsys/amdgpu: Pull in LLVM CFLAGSMichel Dänzer2018-12-192-1/+2
* radeonsi: move SI_FORCE_FAMILY functionality to winsysNicolai Hähnle2018-12-191-0/+36
* gallium: Constify drisw_loader_funcs structMichal Srb2018-12-052-3/+3
* Revert "winsys/amdgpu: overallocate buffers for faster address translation on...Marek Olšák2018-11-291-24/+0
* amd/addrlib: update Mesa's copy of addrlibNicolai Hähnle2018-11-291-1/+1
* winsys/svga: Fix a memory leakThomas Hellstrom2018-11-291-0/+2
* winsys/amdgpu: add support for allocating GDS and OA resourcesMarek Olšák2018-11-281-22/+33
* winsys/amdgpu: use optimal VM alignment for CPU allocationsMarek Olšák2018-11-281-2/+4
* winsys/amdgpu: use optimal VM alignment for imported buffersMarek Olšák2018-11-281-20/+29
* winsys/amdgpu,radeon: pass vm_alignment to buffer_from_handleMarek Olšák2018-11-283-2/+5
* winsys/amdgpu: overallocate buffers for faster address translation on Gfx9Marek Olšák2018-11-281-0/+24
* winsys/amdgpu: increase the VM alignment to the MSB of the size for Gfx9Marek Olšák2018-11-281-1/+11
* winsys/amdgpu: use >= instead of > for VM address alignmentMarek Olšák2018-11-281-1/+1
* winsys/amdgpu: clean up code around BO VM alignmentMarek Olšák2018-11-281-2/+7
* winsys/amdgpu: optimize slab allocation for 2 MB amdgpu page tablesMarek Olšák2018-11-283-2/+10
* radeonsi: generalize the slab allocator code to allow layered slab allocatorsMarek Olšák2018-11-283-24/+86
* winsys/amdgpu: always reclaim/release slabs if there is not enough memoryMarek Olšák2018-11-281-7/+13
* winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2018-11-282-33/+66
* winsys/amdgpu: add amdgpu_winsys_bo::lockNicolai Hähnle2018-11-283-13/+20
* virgl,vtest: Initialize return valueGert Wollny2018-11-281-1/+1
* v3d: Add renderonly support.Eric Anholt2018-11-272-1/+9
* freedreno: move drm to common locationRob Clark2018-11-272-0/+2
* winsys/amdgpu: fix a device handle leak in amdgpu_winsys_createMarek Olšák2018-11-231-0/+6
* winsys/amdgpu: fix a buffer leak in amdgpu_bo_from_handleMarek Olšák2018-11-231-0/+6
* virgl: fix vtest regression since fencing changes.Dave Airlie2018-11-191-0/+1
* virgl: Use file descriptor instead of un-allocated objectGert Wollny2018-11-191-1/+1
* virgl: Clean up fences commitRobert Foss2018-11-183-3/+0
* virgl: native fence fd supportRobert Foss2018-11-164-6/+104
* radeonsi: stop command submission with PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET onlyMarek Olšák2018-11-093-3/+7
* winsys/amdgpu: Stop using amdgpu_bo_handle_type_kms_noimportMichel Dänzer2018-11-071-3/+3
* virgl/vtest-winsys: Use virgl version of bind flagsGert Wollny2018-11-021-1/+1
* Revert "imx: make use of loader_open_render_node(..) helper"Christian Gmeiner2018-10-311-2/+1
* gallium: rework PIPE_HANDLE_USAGE_* flagsMarek Olšák2018-10-301-2/+2
* scons: drop unused HAVE_STDINT_H macroEric Engestrom2018-10-301-1/+0
* svga: Add missing include guardsMichał Janiszewski2018-10-301-0/+1
* freedreno: import libdrm_freedreno + redesign submitRob Clark2018-10-261-1/+1
* winsys/amdgpu: add vcn jpeg cs supportBoyuan Zhang2018-10-231-0/+12
* android: Build kms_swrast for the Android platformRob Herring2018-10-221-0/+33
* freedreno: Remove the Emacs mode linesNeil Roberts2018-10-171-2/+0
* virgl: Pass resource size and transfer offsetsTomeu Vizoso2018-10-064-28/+208
* virgl, vtest: Correct the transfer size calculationGert Wollny2018-10-061-1/+3
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