summaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys
Commit message (Collapse)AuthorAgeFilesLines
* virgl/vtest: fix extra mallocDave Airlie2015-10-311-1/+1
| | | | | | | | This somehow got added twice, drop the first one. Reported by Coverity. Signed-off-by: Dave Airlie <[email protected]>
* gallium/swrast: fixup build breakage and warningsDave Airlie2015-10-316-1/+6
| | | | | | | The front buffer rendering changes broke an interface, I didn't fix up all of them. Signed-off-by: Dave Airlie <[email protected]>
* gallium/swrast: fix front buffer blitting. (v2)Dave Airlie2015-10-311-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So I've known this was broken before, cogl has a workaround for it from what I know, but with the gallium based swrast drivers BlitFramebuffer from back to front or vice-versa was pretty broken. The legacy swrast driver tracks when a front buffer is used and does the get/put images when it is mapped/unmapped, so this patch attempts to add the same functionality to the gallium drivers. It creates a new context interface to denote when a front buffer is being created, and passes a private pointer to it, this pointer is then used to decide on map/unmap if the contents should be updated from the real frontbuffer using get/put image. This is primarily to make gtk's gl code work, the only thing I've tested so far is the glarea test from https://github.com/ebassi/glarea-example.git v2: bump extension version, check extension version before calling get image. (Ian) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91930 Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* winsys/virgl: rework line wrapping/indentEmil Velikov2015-10-304-92/+124
| | | | | | | | Wrap some of the 'omg it's getting out of hand' long lines, and re-indent where things feel off. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: unwrap the includesEmil Velikov2015-10-306-26/+27
| | | | | | | | Include what you want, rather than relying on a header foo.h N levels down the include chain, to provide something that you need. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl: remove temporary ret variableEmil Velikov2015-10-301-9/+3
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl: always memset prior to ioctlEmil Velikov2015-10-301-4/+8
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl: use MALLOC to match FREEEmil Velikov2015-10-301-1/+1
| | | | | | | The uppercase versions are wrappers which must be matched. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl: remove calloc/malloc castsEmil Velikov2015-10-302-5/+3
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl: throw in some inline wrappersEmil Velikov2015-10-304-10/+40
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl/drm: drop unneeded forward declarationEmil Velikov2015-10-301-2/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: move virgl_hw.h into the driver dirEmil Velikov2015-10-306-291/+2
| | | | | | | | | | | Strictly speaking virgl_hw.h should reside in the driver folder, as it describes the hardware. Moving it allows us to nuke the following strange dependency winsys/vtest > driver > winsys/drm Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: straighten the includes confusionEmil Velikov2015-10-303-5/+5
| | | | | | | | | Use the relevant GALLIUM_foo_CFLAGS which has all the requirements (not to mention VISIBITY_CFLAGS) and keep ../ out of the include directives. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: remove the _FILE_OFFSET_BITS definesEmil Velikov2015-10-303-7/+0
| | | | | | | The build already sets it as needed. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl/drm: add all files to the tarballEmil Velikov2015-10-301-1/+5
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/virgl/vtest: list all files in Makefile.sourcesEmil Velikov2015-10-301-1/+4
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* virgl: fix drm.h include pathEmil Velikov2015-10-301-1/+1
| | | | | | | | | | | | The drm/ prefix is required, if using the kernel provided headers. As most distros don't ship them it and we already depend on libdrm (which adds the relevant -I flag) just drop the drm/ from the include. Once a libdrm release with the virtgpu_drm.h header is released, we can drop our local copy of the file. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* winsys/amdgpu: remove the dcc_enable surface flagMarek Olšák2015-10-271-7/+6
| | | | | | dcc_size is sufficient and doesn't need a further comment in my opinion. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: Allocate buffers for DCC.Bas Nieuwenhuizen2015-10-241-5/+42
| | | | | | | | | | | As the alignment requirements can be 32 KiB or more, also adding an aligned buffer creation function. DCC is disabled for textures that can be shared as sharing the DCC buffers has not been implemented yet. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: add support for Stoney asics (v3)Samuel Li2015-10-232-3/+11
| | | | | | | | | | | v2 (agd): rebase on mesa master, split pci ids to separate commit v3 (agd): use carrizo for llvm processor name for llvm 3.7 and older Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Samuel Li <[email protected]> Cc: [email protected]
* virgl/vtest: add vtest driverDave Airlie2015-10-237-0/+1227
| | | | | | | | | | | | | | | | | | | | | virgl/vtest is a swrast driver that allows the virgl acceleration to be tested without having a virtual machine. The backend has a unix socket server that this connects to. This is run by setting LIBGL_ALWAYS_SOFTWARE=y GALLIUM_DRIVER=virpipe In this mode all renderering is sent over a socket to the remote renderer, and the results are readback and copies to the screen using drisw. This works well enough to develop new features and to help debug. Signed-off-by: Dave Airlie <[email protected]>
* virgl: add driver for virtio-gpu 3D (v2)Dave Airlie2015-10-237-0/+1377
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | virgl is the 3D acceleration backend for the virtio-gpu shipping with qemu. The 3D acceleration is designed around gallium and TGSI as the virtualisation layer. The backend renderer translates the virgl interface into OpenGL currently. This is the initial import of the driver to mesa. The kernel driver portions are lined up for drm-next. Currently this driver supports up to GL3.3 and some misc extensions if the host driver exposes it. It is planned to iterate the virgl API to new GL levels as mesa host drivers gain features. v2: fix resource tracking across flushes to avoid ->bind hack in mapping. consolidate mapping and waiting code for transfers. use u_range for dirt tracking. handle larger shaders in protocol. include virtgpu_drm.h in mesa for now. add translation layer for gallium tgsi to virgl tgsi. Signed-off-by: Dave Airlie <[email protected]>
* svga: Condition preemptive flush on draw emissionSinclair Yeh2015-10-221-5/+10
| | | | | | | | | | | | | | On ultra high resolution modes, the preemptive flush flag can be set midway through command submission, a condition that cannot be recovered from a flush-retry, causing rendering artifacts. This patch prevents a preemtive_flush until a draw has been emitted. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/radeon: implement cs_get_buffer_listMarek Olšák2015-10-033-22/+47
| | | | | | | This is more complicated, because tracking priority_usage needed changing the relocs_bo type. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: add winsys function cs_get_buffer_listMarek Olšák2015-10-032-0/+20
| | | | | | For debugging. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: stop using "reloc" in a few placesMarek Olšák2015-10-034-53/+53
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: tell the winsys the exact resource binding typesMarek Olšák2015-10-032-9/+10
| | | | | | | Use the priority flags and expand them. This information will be used for debugging. Reviewed-by: Michel Dänzer <[email protected]>
* freedreno: one screen to rule them allRob Clark2015-09-161-4/+113
| | | | | | | | | | Similar to fee0686c21c631d96d6042741267a3c218c23ffc, but in this case to ensure that drm_gralloc and libGLES_mesa are sharing a single screen. Bumps libdrm_freedreno version dependency, as it requires the new fd_device_fd() API. Signed-off-by: Rob Clark <[email protected]>
* winsys/svga: remove useless assertionBrian Paul2015-09-101-1/+0
| | | | | | An unsigned int is always >= 0. Found with Coverity. Reviewed-by: Charmaine Lee <[email protected]>
* winsys/amdgpu: calculate the maximum number of compute unitsMarek Olšák2015-09-101-2/+13
| | | | | | | Required for register spilling. Cc: 11.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: remove exported buffers from the cacheMarek Olšák2015-09-031-0/+3
| | | | | Cc: 11.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* winsys/amdgpu: remove exported buffers from the cacheMarek Olšák2015-09-031-0/+3
| | | | | Cc: 11.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* svga/winsys: Add support for VGPU10Brian Paul2015-09-0219-119/+362
| | | | | | | This involves a few driver modifications to keep things building. The driver may not actually run properly at this point. Signed-off-by: Brian Paul <[email protected]>
* winsys/svga: add new vmw_query.c[h] filesBrian Paul2015-09-023-1/+214
| | | | | | Functions for creating, destroying, getting queries, etc. Signed-off-by: Brian Paul <[email protected]>
* winsys/radeon: add a flag telling how gfx IBs should be paddedMarek Olšák2015-09-012-6/+9
| | | | | | | This is always false on amdgpu (set by calloc). Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]>
* winsys/amdgpu: remove IB padding for SIMarek Olšák2015-09-011-17/+5
| | | | | | | SI is unsupported by amdgpu Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]>
* winsys/amdgpu: use small IBs for better performance on VIMarek Olšák2015-09-011-7/+9
| | | | | Reviewed-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]>
* winsys/radeon: handle non-zero finite timeout when waiting for buffersMarek Olšák2015-08-292-38/+41
| | | | Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: read_registers should return bool meaning success or failureMarek Olšák2015-08-262-5/+7
| | | | | Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]>
* gallium: add flags parameter to pipe_screen::context_createMarek Olšák2015-08-261-1/+1
| | | | | | | | This allows creating compute-only and debug contexts. Reviewed-by: Brian Paul <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]>
* Revert "radeon/winsys: increase the IB size for VM"Marek Olšák2015-08-234-17/+6
| | | | | | | | | This reverts commit 567394112d904096abff1d994ab952f475dfb444. It regressed performance. It looks like smaller IBs are better, because the GPU goes idle quicker and there is less waiting for buffers and fences. Cc: 11.0 <[email protected]>
* winsys/sw/kms-dri: don't attempt to bundle the sconscriptEmil Velikov2015-08-221-2/+0
| | | | | | | | The build/file was removed with an earlier commit while the EXTRA_DIST was forgotten. Fixes: 66d77cd71c6 (scons: don't build the kms-dri winsys) Signed-off-by: Emil Velikov <[email protected]>
* winsys/amdgpu: automake: remove missing headersEmil Velikov2015-08-221-2/+0
| | | | | | | The files are not referenced in any other place in whole of mesa. They are likely remnants of the early development stage. Signed-off-by: Emil Velikov <[email protected]>
* android: fix cflags and includes for amdgpu winsysMauro Rossi2015-08-221-0/+10
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* winsys/amdgpu: fix the type of memory usage countersMarek Olšák2015-08-191-2/+2
| | | | | | | | | If the 32-bit types overflowed, the driver could submit an IB that uses much more memory than is available. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeon/vce: disable VCE dual instance for harvest partLeo Liu2015-08-141-0/+1
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: add support for FIJI (v4)Alex Deucher2015-08-141-0/+4
| | | | | | | | | | | | v2: incorporate comments from Marek v3: add missing fiji case in winsys init use tonga raster config (double check this) v4: rebase on harvest patch Reviewed-by: Marek Olšák <[email protected]> (v3) Reviewed-by: Christian König <[email protected]> (v3) Reviewed-by: David Zhang <[email protected]> (v3) Signed-off-by: Alex Deucher <[email protected]>
* winsys/amdgpu: add addrlib support for Fiji (v2)Alex Deucher2015-08-143-1/+11
| | | | | | | | | v2: fix tonga chip check Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: David Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* winsys/amdgpu: add addrlib - texture addressing and alignment calculatorMarek Olšák2015-08-1427-3/+22370
| | | | | | | | | This is an internal project that Catalyst uses and now open source will do too. v2: squashed these commits in: - winsys/amdgpu: fix warnings in addrlib - winsys/amdgpu: set PIPE_CONFIG and NUM_BANKS in tiling_flags
* winsys/amdgpu: add a new winsys for the new kernel driverMarek Olšák2015-08-1411-1/+2342
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - lots of changes according to Emil Velikov's comments - implemented radeon_winsys::read_registers v3: - a lot of new work, many of them adapt to libdrm interface changes Squashed patches: winsys/amdgpu: implement radeon_winsys context support winsys/amdgpu: add reference counting for contexts winsys/amdgpu: add userptr support winsys/amdgpu: allocate IBs like normal buffers winsys/amdgpu: add IBs to the buffer list, adapt to interface changes winsys/amdgpu: don't use KMS handles as reloc hash keys winsys/amdgpu: sync buffer accesses to different rings winsys/amdgpu: use dependencies instead of waiting for last fence v2 gallium/radeon: unify buffer_wait and buffer_is_busy in the winsys interface (amdgpu part) winsys/amdgpu: track fences per ring and be thread-safe winsys/amdgpu: simplify waiting on a variable in amdgpu_fence_wait gallium/radeon: allow the winsys to choose the IB size (amdgpu part) winsys/amdgpu: switch to new amdgpu_cs_query_fence_status interface winsys/amdgpu: handle fence and dependencies merge winsys/amdgpu follow libdrm change to move user fence into UMD winsys/amdgpu: use amdgpu_bo_va_op for va map/unmap v2 winsys/amdgpu: use the new tiling flags winsys/amdgpu: switch to new GTT_USWC definition winsys/amdgpu: expose amdgpu_cs_query_reset_state to drivers winsys/amdgpu: fix valgrind warnings winsys/amdgpu: don't use VRAM with APUs that don't have much of it winsys/amdgpu: require LLVM 3.6.1 for VI because of bug fixes there winsys/amdgpu: remove amdgpu_winsys::num_cpus winsys/amdgpu: align BO size to page size winsys/amdgpu: reduce BO cache timeout winsys/amdgpu: remove useless flushing and waiting in amdgpu_bo_set_tiling winsys/amdgpu: use amdgpu_device_handle as a unique device ID instead of fd winsys/amdgpu: use safer access to amdgpu_fence_wait::signalled winsys/amdgpu: allow maximum IB size of 4 MB winsys/amdgpu: add ip_instance into amdgpu_fence gallium/radeon: add RING_COMPUTE instead of RADEON_FLUSH_COMPUTE winsys/amdgpu: set the ring type at CS initilization winsys/amdgpu: query the GART page size from the kernel winsys/amdgpu: correctly wait for shared buffers to become idle winsys/amdgpu: set the amdgpu_cs_fence structure only once at fence creation winsys/amdgpu: add a specific error message for cs_submit -> -ENOMEM winsys/amdgpu: check num_active_ioctls before calling amdgpu_bo_wait_for_idle winsys/amdgpu: clear user fence BO after allocating it winsys/amdgpu: fix user fences winsys/amdgpu: make amdgpu_winsys_create public winsys/amdgpu: remove thread offloading winsys/amdgpu: flatten the amdgpu_cs_context structure and simplify more v4: require libdrm 2.4.63
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 18:40:26 +0000