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* winsys/radeon: add usage parameter to cs_is_buffer_referencedMarek Olšák2012-03-052-3/+18
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl: move dirty area handling into winsys abstractionChristian König2012-03-013-2/+48
| | | | | | Fixing uninitialized areas in SwapBuffers mode. Signed-off-by: Christian König <[email protected]>
* vl: hide X latency by using asynchronous requestsChristian König2012-03-011-11/+37
| | | | Signed-off-by: Christian König <[email protected]>
* vl: use SwapBuffers instead of CopyBuffersChristian König2012-03-011-40/+9
| | | | | | | | | This should speed things up a bit, but also shows some bugs with the kernel implementation. v2: require xcb-dri2 version 1.8 Signed-off-by: Christian König <[email protected]>
* vl: rewrite vl DRI backend using XCBChristian König2012-03-014-856/+145
| | | | | | v2: also set array_size of texture Signed-off-by: Christian König <[email protected]>
* vl: fix a douple free in xsp winsys backendChristian König2012-02-271-1/+1
| | | | | | | There are a couple of more bugs, but it is only useful for debugging anyway. Signed-off-by: Christian König <[email protected]>
* r600g: check for R600_STREAMOUT env var in winsysMarek Olšák2012-02-272-0/+5
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* vl: rework winsys interfaceChristian König2012-02-253-185/+54
| | | | | | Throw out all the old and now unneeded stuff. Signed-off-by: Christian König <[email protected]>
* vl: cleanup dri winsys abstractionChristian König2012-02-257-1575/+56
| | | | | | There was way to much dead code in it. Signed-off-by: Christian König <[email protected]>
* radeon/r600g: fix virtual address space allocationJerome Glisse2012-02-211-0/+3
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix tiling with cayman and virtual memoryJerome Glisse2012-02-141-10/+28
| | | | | | | | | The virtual address but follow the alignment requirement of the tiled surface. The bo from handle case is not properly fix. Need bigger change for a proper fix. Work around that by enforcing 1M alignment for those bo. Signed-off-by: Jerome Glisse <[email protected]>
* radeon: only init surface manage on r600Dave Airlie2012-02-071-4/+8
| | | | | | r300 fails to init the manager and then fails to init. Signed-off-by: Dave Airlie <[email protected]>
* scons: r300/r600 now depends on libdrm.José Fonseca2012-02-072-36/+1
| | | | As they now indirectly include on libdrm/radeon_surface.h.
* r600g: add support for common surface allocator for tiling v13Jerome Glisse2012-02-064-2/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tiled surface have all kind of alignment constraint that needs to be met. Instead of having all this code duplicated btw ddx and mesa use common code in libdrm_radeon this also ensure that both ddx and mesa compute those alignment in the same way. v2 fix evergreen v3 fix compressed texture and workaround cube texture issue by disabling 2D array mode for cubemap (need to check if r7xx and newer are also affected by the issue) v4 fix texture array v5 fix evergreen and newer, split surface values computation from mipmap tree generation so that we can get them directly from the ddx v6 final fix to evergreen tile split value v7 fix mipmap offset to avoid to use random value, use color view depth view to address different layer as hardware is doing some magic rotation depending on the layer v8 fix COLOR_VIEW on r6xx for linear array mode, use COLOR_VIEW on evergreen, align bytes per pixel to a multiple of a dword v9 fix handling of stencil on evergreen, half fix for compressed texture v10 fix evergreen compressed texture proper support for stencil tile split. Fix stencil issue when array mode was clear by the kernel, always program stencil bo. On evergreen depth buffer bo need to be big enough to hold depth buffer + stencil buffer as even with stencil disabled things get written there. v11 rebase on top of mesa, fix pitch issue with 1d surface on evergreen, old ddx overestimate those. Fix linear case when pitch*height < 64. Fix r300g. v12 Fix linear case when pitch*height < 64 for old path, adapt to libdrm API change v13 add libdrm check Signed-off-by: Jerome Glisse <[email protected]>
* r600g: remove unused flush codeMarek Olšák2012-01-312-13/+1
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* vl: fix some missing prototypes errorChristian König2012-01-311-27/+0
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45444 Signed-off-by: Christian König <[email protected]>
* r600g: add support for virtual address space on cayman v11Jerome Glisse2012-01-136-10/+273
| | | | | | | | | | | | | | | | | | | | | | | | | Virtual address space put the userspace in charge of their GPU address space. It's up to userspace to bind bo into the virtual address space. Command stream can them be executed using the IB_VM chunck. This patch add support for this configuration. It doesn't remove the 64K ib size limit thought this limit can be extanded up to 1M for IB_VM chunk. v2: fix rendering v3: fix rendering when using index buffer v4: make vm conditional on kernel support add basic va management v5: catch the case when we already have va for a bo v6: agd5f: update on top of ioctl changes v7: agd5f: further ioctl updates v8: indentation cleanup + fix non cayman v9: rebase against lastest mesa + improvement from Marek & Michel v10: fix cut/paste bug v11: don't rely on updated radeon_drm.h Signed-off-by: Jerome Glisse <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* svga: Drop execbuf throttlingJakob Bornecrantz2012-01-104-35/+1
| | | | | | | | This code isn't used anymore in preference for DRI2 client side swap buffers throttling or throttling done inside the xa or xorg driver. Signed-off-by: Jakob Bornecrantz <[email protected]> Reviewed-by Brian Paul <[email protected]>
* svga: Silence warningJakob Bornecrantz2012-01-101-0/+1
| | | | | Signed-off-by: Jakob Bornecrantz <[email protected]> Reviewed-by Brian Paul <[email protected]>
* radeon/winsys: fix get info ioctl error checkingJerome Glisse2012-01-091-3/+5
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* winsys/radeon: move managing GEM domains back to driversMarek Olšák2011-12-244-56/+40
| | | | | | | | This partially reverts commit 363ff844753c46ac9c13866627e096b091ea81f8. It caused severe performance drops in Nexuiz. Reported by Phoronix. Tested by me on r300g and by IRC people on r600g.
* nouveau: get rid of winsys objectMarcin Slusarz2011-12-133-86/+2
| | | | Its only purpose was to destroy itself.
* winsys/radeon: add flush option not to rewrite tiling flags in registersMarek Olšák2011-12-133-4/+24
| | | | Not used yet.
* g3dvl/xlib: fix build by changing include orderTobias Droste2011-12-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | fixes the following build error since c83fb4d45f2a47042f395271efe6e5489b2c4aee: /usr/include/strings.h:46:13: error: expected declaration specifiers or ‘...’ before numeric constant /usr/include/strings.h:46:13: error: conflicting types for ‘memset’ In file included from ../../../../src/gallium/winsys/g3dvl/xlib/xsp_winsys.c:34:0: ../../../../src/gallium/auxiliary/util/u_inlines.h: In function ‘pipe_buffer_create’: ../../../../src/gallium/auxiliary/util/u_inlines.h:189:4: error: too many arguments to function ‘memset’ /usr/include/strings.h:46:13: note: declared here bzero is defined in X11 as: #define bzero(b,len) memset(b,0,len) including strings.h after the X11 header results in preprocessor replacing 'bzero' in strings.h and generating unbuildable code. Signed-off-by: Tobias Droste <[email protected]>
* gallium/radeon: fix indentationJerome Glisse2011-12-054-28/+28
| | | | | | Indentation cleanup, to keep consistency. Signed-off-by: Jerome Glisse <[email protected]>
* i965g: Delete this driver.Kai Wasserbäch2011-11-299-1286/+0
| | | | | | | Never completed, and no plans to do so. Signed-off-by: Kai Wasserbäch <[email protected]> Signed-off-by: José Fonseca <[email protected]>
* android: add support for ICSChia-I Wu2011-11-251-19/+28
| | | | | | | | With ICS (Android 4.0), several headers and structs are renamed. Define ANDROID_VERSION so that we can choose a different path depending on the platform version. I've tested only softpipe and llvmpipe. r600g is also reported to work.
* nvc0: add support for GF119 (NVD9)Ben Skeggs2011-11-171-0/+1
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* radeon: silence initializer warningsBrian Paul2011-11-102-11/+33
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* dri: drop DRI_VALIDATE macrosGeorge Sapountzis2011-11-041-24/+0
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* winsys/radeon: don't use the new GEM_WAIT ioctl for nowMarek Olšák2011-10-241-4/+6
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* winsys/radeon: restore the old r600g winsys memory characteristics.Mathias Fröhlich2011-10-241-0/+5
| | | | | | | | | Use VRAM for static and immutable buffers. This restores the recently removed r600g winsys behaviour for memory locations. This also improoves rendering times on the gpu for some OpenSceneGraph based test cases by about 15%. Signed-off-by: Marek Olšák <[email protected]>
* winsys/svga: Remove some unneeded debug codeThomas Hellstrom2011-10-191-16/+0
| | | | | | | | | | | This code isn't really relevant since the kernel takes care not to destroy busy GMR buffers. Also with the advent of fence objects, the code was incorrect since it didn't refcount fence handles. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* winsys/svga: Rework buffer allocation to make it more robust v2.Thomas Hellstrom2011-10-143-17/+57
| | | | | | | | | | | | | | | | Don't allow any "CPU" buffers to be allocated by the pb_fenced buffer manager, since we can't protect against failures during buffer validation. Also, add an extra slab buffer manager to allocate buffers from the kernel if there is a failure to allocate from our big buffer pool. The reason we use a slab manager for this, is to avoid allocating many very small buffers from the kernel. v2: Increased VMW_MAX_BUFFER_SIZE and fixed some comments. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* svga/winsys: Make sure a flush always inserts and returns a fence if requestedThomas Hellstrom2011-10-141-1/+1
| | | | | | | Needed for throttling. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrant <[email protected]>
* configure: replace pkg-config calls with $(PKG_CONFIG) in the makefiles.Stéphane Marchesin2011-10-046-10/+10
| | | | | | | Us poor souls who cross compile mesa want to be able to specify which pkg-config to pick, or at least just change one place. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* r600g: move all files from winsys/r600 into drivers/r600Marek Olšák2011-09-308-3294/+0
| | | | | | Be sure to reconfigure after this commit. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: move GEM domains out of the drivers into winsysMarek Olšák2011-09-305-46/+60
| | | | | | | | | | | | | | | The drivers don't need to care about the domains. All they need to set are the bind and usage flags. This simplifies the winsys too. This also fixes on r600g: - fbo-depth-GL_DEPTH_COMPONENT32F-copypixels - fbo-depth-GL_DEPTH_COMPONENT16-copypixels - fbo-depth-GL_DEPTH_COMPONENT24-copypixels - fbo-depth-GL_DEPTH_COMPONENT32-copypixels - fbo-depth-GL_DEPTH24_STENCIL8-copypixels I can't explain it. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: remove a redundant parameter 'size' from buffer_from_handleMarek Olšák2011-09-302-8/+3
| | | | | | It's part of pb_buffer already. Reviewed-by: Alex Deucher <[email protected]>
* r600g: remove struct radeon (or what's left of it)Marek Olšák2011-09-305-72/+13
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: move family and chip_class from struct radeon to r600_screenMarek Olšák2011-09-304-55/+15
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: merge r600_bo with r600_resourceMarek Olšák2011-09-307-191/+64
| | | | | | | I have moved 'last_flush' and 'binding' from r600_bo to winsys/radeon. The other members are now part of r600_resource. Reviewed-by: Alex Deucher <[email protected]>
* winsys/svga: Update to vmwgfx kernel module 2.1Thomas Hellstrom2011-09-299-261/+665
| | | | | | | | | Introduces fence objecs and a size limit on query buffers. The possibility to map the fifo from user-space is gone, and replaced by an ioctl that reads the 3D capabilities. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecranz <[email protected]>
* winsys/radeon: remove redundant member radeon_bo::sizeMarek Olšák2011-09-293-8/+5
| | | | It's part of pb_buffer already.
* winsys/radeon: simplify updating GEM domains for relocationsMarek Olšák2011-09-291-10/+2
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* winsys/radeon: simplify passing GEM domains through to GEM_CREATEMarek Olšák2011-09-292-25/+13
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* r600g: convert if (query->type) into switch statementsMarek Olšák2011-09-291-26/+54
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* winsys/radeon: use the cache bufmgr for buffers with PIPE_BIND_CUSTOMMarek Olšák2011-09-161-1/+1
| | | | so that we don't abuse PIPE_BIND_VERTEX_BUFFER all the time.
* r600g: Initialize multi VGT related register on Cayman.Michel Dänzer2011-09-141-0/+1
| | | | | | | | Prevents lockups with piglit tests draw-elements and draw-vertices using large numbers of vertices. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix typo in "r600g: simplify deducing chip family"Marek Olšák2011-09-131-1/+1
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