| Commit message (Collapse) | Author | Age | Files | Lines |
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it's cleaner this way.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Allocating huge buffers in VRAM is not a problem, but when those buffers
start being migrated, the kernel runs into errors because it cannot split
those buffer up for moving through GTT.
This should fix intermittent failures of
GL45-CTS.texture_buffer.texture_buffer_max_size
Cc: [email protected]
Reviewed-by: Marek Olšák <[email protected]>
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This results in a very tiny decrease in lgkm wait cycles.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Provided by libdrm as of last commit.
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Cc: Edward O'Callaghan <[email protected]>
Signed-off-by: Emil Velikov <[email protected]>
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cs can be NULL when it comes from r600_buffer_map_sync_with_rings()
to avoid doing the same checks. It was checked for write mappings
but not for read mappings.
Cc: "17.0" <[email protected]>
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This is no longer actively maintained and is just
accumulating bitrot.
Signed-off-by: Edward O'Callaghan <[email protected]>
Acked-by: Chia-I Wu <[email protected]>
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The kernel driver reports correct values now.
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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the value from the kernel is wrong
Reviewed-by: Nicolai Hähnle <[email protected]>
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The time spent in the function dropped by 37% for torcs.
Reviewed-by: Nicolai Hähnle <[email protected]>
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The perf difference is very small, 3.25->2.84% in amdgpu_cs_flush()
in the DXMD benchmark.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This would be a fix if the value was used anywhere.
Reviewed-by: Nicolai Hähnle <[email protected]>
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This just needs to be done for r600g in the screen.
We don't need an IB submission for every new context created for GCN.
Reviewed-by: Nicolai Hähnle <[email protected]>
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This new query returns the current visible usage of VRAM accessed
by the CPU. It will return 0 on radeon because it's unimplemented.
Signed-off-by: Samuel Pitoiset <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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R600_DEBUG="info" can be used to display that size, as well as
the total amount of VRAM/GTT.
Signed-off-by: Samuel Pitoiset <[email protected]>
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Useful when debugging applications which map a ton of buffers
and also because we used to run into Linux's limit on the number
of simultaneous mmap() calls.
v2: - update the commit message
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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The corruption is inevitable and hangs are possible too.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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... and list the public header within it.
Signed-off-by: Emil Velikov <[email protected]>
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Changes from V1 -> V2:
- updated Copyright
- added $(top_srcdir)/src/gallium/winsys to include path (suggested by Emil)
- adapted driver to new renderonly API
Signed-off-by: Christian Gmeiner <[email protected]>
Acked-by: Emil Velikov <[email protected]>
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This driver supports a wide range of Vivante IP cores like GC880,
GC1000, GC2000 and GC3000.
Changes from V1 -> V2:
- added missing files to actually integrate the driver into build system.
- adapted driver to new renderonly API
Signed-off-by: Christian Gmeiner <[email protected]>
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Wladimir J. van der Laan <[email protected]>
Acked-by: Emil Velikov <[email protected]>
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The CS thread is needed to ensure proper ordering of operations and can't
be disabled (without complicating the code).
Discovered by Nine CSMT, which ended up in a deadlock.
Acked-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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v2: use gfxip names for llvm 4.0+
v3: use tonga for llvm <= 3.8, drop gfxip name,
we can just change that we change the other asics.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Junwei Zhang <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Acked-by: Christian König <[email protected]>
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Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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FORCE_TILING should disable it. It has no effect now, but that may change
soon.
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98518
Acked-by: Edward O'Callaghan <[email protected]>
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For symmetry with surf_drm_to_winsys.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Fixes valgrind warnings about surf_ws->flags being uninitialized while
starting X.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Fixes valgrind warnings about using uninitialized memory when starting X.
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Fixes spurious assertion failure in surf_level_drm_to_winsys when
starting X, due to processing a miplevel which was never initialized.
Fixes: e9c76eeeaa67 ("gallium/radeon: remove radeon_surf_level::pitch_bytes")
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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GCN can use a completely different tile mode for FMASK.
FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.
Reviewed-by: Nicolai Hähnle <[email protected]>
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I expect no change in behavior, because r600_texture.c forces the same
tile mode as the base texture has.
Reviewed-by: Nicolai Hähnle <[email protected]>
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these names were misleading.
Reviewed-by: Nicolai Hähnle <[email protected]>
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These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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This removes input-only parameters from the radeon_surf structure.
Some of the translation logic from pipe_resource to radeon_surf is moved to
winsys/radeon.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Maybe this is why SDMA has been broken for many amdgpu users?
SDMA is the only block which is used with imported textures and relies
on this variable. DB also uses it, but it doesn't get imported textures,
so it's unaffected.
I do get SDMA failures on Tonga before this patch if R600_DEBUG=testdma
is changed to use imported textures.
Cc: 11.2 12.0 13.0 <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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so that decompress blits aren't needed and depth texturing needs less
memory bandwidth.
Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible
HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16.
The format promotion is not visible to state trackers.
This is part of TC-compatible renderbuffer compression, which has 3 parts:
DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now.
I don't see a measurable increase in performance though.
(I tested Talos Principle and DiRT: Showdown, the latter is improved by
0.5%, which is almost noise, and it originally used layered Z16,
so at least we know that Z16 promoted to Z32F isn't slower now)
Tested-by: Edmondo Tommasina <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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