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* r600g: only add blocks once to the dirty/enabled lists.Dave Airlie2011-06-081-3/+5
| | | | | | This caused a loop in some tests. Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix regression in recent state changes.Dave Airlie2011-06-081-0/+1
| | | | | | | | | | We weren't emitting the SQ setup regs at all which really is fail. When a state is always enabled we need to add it to the dirty list as well. Signed-off-by: Dave Airlie <[email protected]>
* r600g: move simple part of bo reloc processing inline.Dave Airlie2011-06-082-12/+17
| | | | | | | This just moves the messy stuff out of the fast path, and leaves the fast-case in the fast path. Signed-off-by: Dave Airlie <[email protected]>
* r600g: split resource emit path from main register emit pathDave Airlie2011-06-083-17/+102
| | | | | | | | | Since resources don't generally vary in size, this splits the emit path, it also takes into a/c that texture and vertex resources have different number of relocs, and avoids emitting the extra reloc for vertex resources. Signed-off-by: Dave Airlie <[email protected]>
* r600g: exit bo per reg scanning loop early.Dave Airlie2011-06-082-9/+13
| | | | | | | | | Exit this loop early to avoid pointless iterations later. Move the resource bos to the first two regs, it actually doesn't matter which regs we use for this in resource land. Signed-off-by: Dave Airlie <[email protected]>
* r600g: reorder evergreen draw packets to be smaller.Dave Airlie2011-06-081-4/+8
| | | | | | | We were always re-emitting lots of unnecessary changes here, avoid doing that. Signed-off-by: Dave Airlie <[email protected]>
* r600g: inline r600_bo_reference.Dave Airlie2011-06-082-11/+2
| | | | | | This relies on the reference member being first, so document it. Signed-off-by: Dave Airlie <[email protected]>
* r600g: no need to drop the references here.Dave Airlie2011-06-081-2/+0
| | | | | | We drop them when we reference the new objects in the next line. Signed-off-by: Dave Airlie <[email protected]>
* r600g: use memcmp instead of a loop in state_set_resourceDave Airlie2011-06-081-5/+3
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600g : fix incorrect size computation in r600_query_resultPierre-Eric Pelloux-Prayer2011-06-071-1/+2
| | | | | | | | | | | | | query->num_results already has the size in dwords of the query buffer. There no need to multiply again. We were reading past the end of the buffer, resulting in reading garbage. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=37028 agd5f: clarify the comment. Signed-off-by: Alex Deucher <[email protected]>
* r600g: remove pre-r6xx asic families and pci idsAlex Deucher2011-06-071-3/+0
| | | | | | Not sure why these were included originally. Signed-off-by: Alex Deucher <[email protected]>
* r600g: always clear query memoryAlex Deucher2011-06-071-3/+3
| | | | | | | | | | | | | According to the hw documentation, the driver needs to: - allocate 128 bits for each possible DB - clear the 128 bits for each possible DB - write 1 to bits 127 and 63 for upper DBs that don't exist on a particular asic Previously we were only doing these steps if the asic had less than the max possible DBs. Signed-off-by: Alex Deucher <[email protected]>
* r300g: Remove is_r3xxBenjamin Franzke2011-06-073-215/+9
| | | | | | Use r300_pci_ids.h instead. Reviewed-by: Alex Deucher <[email protected]>
* r600g: Use radeon pciid list for the family lookup tableBenjamin Franzke2011-06-072-481/+6
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: optimise the draw emission packets for r600/egDave Airlie2011-06-072-30/+37
| | | | | | This just reduces code size a bit for this chunk. Signed-off-by: Dave Airlie <[email protected]>
* r600g: use an enabled list to track enabled blocks.Dave Airlie2011-06-073-35/+54
| | | | | | | | At the end of flushing we were scanning over 450 blocks with generally about 50 enabled. This reduces the scanning to just the list of enabled blocks. Signed-off-by: Dave Airlie <[email protected]>
* r600g/winsys: overhaul resource range/blocks.Dave Airlie2011-06-073-65/+106
| | | | | | | There isn't much point taking the overhead of range/block lookups on resources we aren't going to be getting resource registers at wierd offsets. Signed-off-by: Dave Airlie <[email protected]>
* r600g: split out block initDave Airlie2011-06-071-46/+55
| | | | | | | This just splits this function up as pre-cursor to reusing the internals of it. Signed-off-by: Dave Airlie <[email protected]>
* r600g: move resource setting to its own structures.Dave Airlie2011-06-073-28/+30
| | | | | | | | | resource setting could be a fair bit more lightweight, this patch just separates the resource structs from the standard reg tracking structs in the driver, later patches will improve the winsys. Signed-off-by: Dave Airlie <[email protected]>
* r600g: only call bo loop if nbos is positive.Dave Airlie2011-06-071-17/+19
| | | | | | | | we don't need to loop over all the registers unless we have some bos in the block, also avoid setting the ctx flags, and move the optional stuff down below this chunk. Signed-off-by: Dave Airlie <[email protected]>
* r600g: don't need to call the packet dirty function if not dirty.Dave Airlie2011-06-072-11/+16
| | | | | | also fix a unneeded dirty check and add a dirty check speedup. Signed-off-by: Dave Airlie <[email protected]>
* r600g: work out range/block etc at state build time.Dave Airlie2011-06-021-4/+2
| | | | | | | | This moves the overhead of working out the range/block to state build time, it also allows the compiler to use constants for a lot of things instead of working them out each time. Signed-off-by: Dave Airlie <[email protected]>
* r600g: migrate macros from r600_priv.h to r600.hDave Airlie2011-06-021-10/+0
| | | | | | this is just an precursor change for some later patches. Signed-off-by: Dave Airlie <[email protected]>
* r600g: remote ctx arg to block/range macros.Dave Airlie2011-06-023-24/+24
| | | | | | These aren't used anymore. Signed-off-by: Dave Airlie <[email protected]>
* r600g: avoid copying unnecessary pieces of a block.Dave Airlie2011-06-021-11/+20
| | | | | | | This just avoids copying stuff if its going to modify the number of dwords later anyways. Signed-off-by: Dave Airlie <[email protected]>
* r600g: force new evergreen blocks for large range.Dave Airlie2011-06-021-0/+3
| | | | | | | This range was 76 dwords long, the 75th dword changes, the first 60 or so don't. split the block so it emits less often. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add llano supportAlex Deucher2011-05-312-0/+13
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: cs init fixesAlex Deucher2011-05-313-5/+12
| | | | | | | | | - all asics need to emit CONTEXT_CONTROL - all r6xx asics need to emit 3D_START_CMDBUF The ddx and r600c already do this. r600g should as well. Signed-off-by: Alex Deucher <[email protected]>
* r600g: add context control to start of CSDave Airlie2011-05-311-0/+13
| | | | | | | | | On my original R600 card this at least lets gnome shell run for a while longer and the piglit r300-readcache test case works a lot more reliably. Still a few more stability issues running a piglit test run though. Signed-off-by: Dave Airlie <[email protected]>
* r600g: don't emit color blend register on original R600.Dave Airlie2011-05-312-8/+15
| | | | | | The original R600 doesn't have these so don't emit them. Signed-off-by: Dave Airlie <[email protected]>
* r600g: add initial cayman acceleration support.Dave Airlie2011-05-253-4/+424
| | | | | | | | | | | | | | | | Cayman is the RadeonHD 69xx series of GPUs. This adds support for 3D acceleration to the r600g driver. Major changes: Some context registers moved around - mainly MSAA and clipping/guardband related. GPR allocation is all dynamic no vertex cache - all unified in texture cache. 5-wide to 4-wide shader engines (no scalar or trans slot) - some changes to how instructions are placed into slots - removal of END_OF_PROGRAM bit in favour of END flow control clause - no vertex fetch clause - TC accepts vertex or texture Signed-off-by: Dave Airlie <[email protected]>
* r600g: flush the DB dest base as well.Dave Airlie2011-05-251-1/+1
| | | | | | | | If we do this for CB bases then we should do it for DB bases. noticed while adding cayman support. Signed-off-by: Dave Airlie <[email protected]>
* r600g: bump domain selection up one layer.Dave Airlie2011-05-183-6/+24
| | | | | | | this is taken from a patch from Mathias Froehlich, just going to stage it in a few pieces. Signed-off-by: Dave Airlie <[email protected]>
* r600g: reduce flushes so only when texture and CB overlap.Dave Airlie2011-05-152-8/+17
| | | | | | | We only need to do this when the texture and CB are using the same memory area. Signed-off-by: Dave Airlie <[email protected]>
* r300g: dynamically ask for and release Hyper-Z accessMarek Olšák2011-05-153-27/+99
| | | | | We ask for Hyper-Z access when clearing a zbuffer. We release it if no zbuffer clear has been done for 2 seconds.
* r600g: don't unmap if we haven't mappedDave Airlie2011-05-131-2/+4
| | | | | | should fix https://bugs.freedesktop.org/show_bug.cgi?id=37157 Signed-off-by: Dave Airlie <[email protected]>
* r600g: use a local var to store pointer to which register we are working onDave Airlie2011-05-131-7/+8
| | | | | | this just makes the code a little bit cleaner. Signed-off-by: Dave Airlie <[email protected]>
* r600g: make range/block act more like a page tableDave Airlie2011-05-133-50/+45
| | | | | | | | | | | | | | | | only allocate the blocks ptr in the range if we ever have one, otherwise don't bother wasting the memory. valgrind glxinfo before: ==967== in use at exit: 419,754 bytes in 706 blocks ==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated after: ==5227== in use at exit: 419,754 bytes in 706 blocks ==5227== total heap usage: 3,452 allocs, 2,746 frees, 3,140,531 bytes allocate Signed-off-by: Dave Airlie <[email protected]>
* r600g: reduce r600_reg footprintDave Airlie2011-05-133-788/+785
| | | | | | | | This drops 6k of the text segment, a minor drop in the ocean, however it also makes the code a lot cleaner and removes a lot of duplicated information, hopefully making it more maintainable. Signed-off-by: Dave Airlie <[email protected]>
* r600g: reduce memory usage from range/block hash table.Dave Airlie2011-05-133-23/+38
| | | | | | | | | | | | | | | | | | This table covered a large range unnecessarily, reduce the address range covered, use the fact that the bottom two bits aren't significant, and remove unused fields from the range struct. It also drops the hash_size/shift in context in favour of a define, which should make doing the math a bit less CPU intensive. valgrind glxinfo Before: ==320== in use at exit: 419,754 bytes in 706 blocks ==320== total heap usage: 3,691 allocs, 2,985 frees, 7,272,467 bytes allocated After: ==967== in use at exit: 419,754 bytes in 706 blocks ==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated Signed-off-by: Dave Airlie <[email protected]>
* r600g: delay mapping until first map request. (v2)Dave Airlie2011-05-132-6/+4
| | | | | | | | | | | | | | Currently r600g always maps every bo, this is quite pointless as it wastes VM and on 32-bit with wine running VM space is quite useful. So with this patch we don't create the mappings until first use, without tiling enabled this probably won't make a major difference on its own, but with tiled staged uploads it should avoid keeping maps for most of the textures unnecessarily. v2: add bo data ptr check Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix flushes on rs780/rs880Alex Deucher2011-05-111-1/+3
| | | | | | | | | They need the same hack as rv670. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=35312 Signed-off-by: Alex Deucher <[email protected]>
* svga/drm: Implement svga_winsys_screen::get_hw_version.José Fonseca2011-05-101-0/+14
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* r600g: avoid recursion in rv670 flush workaroundAlex Deucher2011-05-061-2/+7
| | | | | | | Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=36914 Signed-off-by: Alex Deucher <[email protected]>
* Add pci id for FirePro 2270Kostas Georgiou2011-05-061-0/+1
| | | | Signed-off-by: Kostas Georgiou <[email protected]>
* r600g: further r6xx cache flush fixesAlex Deucher2011-05-051-12/+10
| | | | | | | Don't emit sync packets for additional CBs or DB. Spotted by Fredrik Höglund. Signed-off-by: Alex Deucher <[email protected]>
* r600g: add rv670 flushing workaround.Dave Airlie2011-05-061-0/+4
| | | | | | | Hopefully we can find out the proper fix for this, but for now this makes the fbo mipmap tests pass on my rv670 (x2 card). Signed-off-by: Dave Airlie <[email protected]>
* r600g: fix cache flushes on r6xxAlex Deucher2011-05-061-9/+27
| | | | | | | | | | | | | | | r6xx asics have some problems with the surface sync logic for the CB and DB. It's recommended to use the event write interface for flushing the DB/CB caches rather than the sync packets. A single event write flush flushes all dst caches, so we only need one for all CBs and DB. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=35312 Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: do RV6xx base updates inline with state updates.Dave Airlie2011-05-052-54/+22
| | | | | | | | | This seems more in line with what the documentation suggests we should be doing. It doesn't fix the rv635 regression, though I thought it might, so it means I've no idea whats actually going wrong there. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* i915g: add const qualifier to silence warningBrian Paul2011-05-031-1/+1
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