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* svga: move host logging to winsysCharmaine Lee2019-05-025-0/+495
| | | | | | | | | This patch adds a host_log interface to svga_winsys and moves the host logging code to the winsys layer. Cc: [email protected] Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Neha Bhende <[email protected]>
* winsys/svga: Don't abort on EBUSY errors from execbufferThomas Hellstrom2019-05-021-1/+3
| | | | | | | | | | This error code typically indicated that a buffer object that was referenced by the command stream was being used for CPU access by another client. The correct action here is to retry after a while. Use usleep() until we have proper kernel support for this wait. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/svga: Update the drm interface fileThomas Hellstrom2019-05-022-174/+188
| | | | | | | | The file vmwgfx_drm.h was a bit outdated. Update to a recent version, including defines supporting coherent memory. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/svga: Enable the transfer_from_buffer GPU command for vgpu10Thomas Hellstrom2019-05-021-0/+1
| | | | | | | | | | We didn't have the path using this command enabled as typically we take an alternate path using DMA uploads. Emable it so that we can exercise that code-path by turning off the DMA path. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/svga: Add an environment variable to force host-backed operationThomas Hellstrom2019-05-021-6/+11
| | | | | | | | | | | | The vmwgfx kernel module has a compatibility mode for user-space that is not guest-backed resource aware. Add an environment variable to facilitate testing of this mode on guest-backed aware kernels: if the environment variable SVGA_FORCE_HOST_BACKED is defined, the driver will use host-backed operation. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Deepak Rawat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* winsys/svga/drm: Include sys/types.hKhem Raj2019-04-301-0/+1
| | | | | | | | | | vmw_screen.h uses dev_t which is defines in sys/types.h this header is required to be included for getting dev_t definition. This issue happens on musl C library, it is hidden on glibc since sys/types.h is included through another system headers Reviewed-by: Eric Engestrom <[email protected]>
* vc4: Fall back to renderonly if the vc4 driver doesn't have v3d.Eric Anholt2019-04-262-3/+35
| | | | | | | I have a platform with vc4 display but V3D 4.x. We can fall back on kmsro's probing to bring up the v3d gallium driver. Acked-by: Rob Clark <[email protected]>
* kmsro: Add support for V3D.Eric Anholt2019-04-262-0/+16
| | | | | | | | | Like vc4, we expect to have SOCs with various displays that have a single V3D instance for rendering. v2: Add v3d to the list of drivers that make enabling kmsro valid. Acked-by: Rob Clark <[email protected]>
* virgl/drm: insert correct handles into the table. (v3)Dave Airlie2019-04-251-1/+4
| | | | | | | | | | This inserts a handle for the flink name and a handle the correct gem handle for the bo. v2: fix handles/names confusion (Lepton Wu) v3: set flink name correctly (Lepton Wu) Reviewed-by: Chia-I Wu <[email protected]>
* virgl/drm: handle flink name better.Dave Airlie2019-04-252-20/+11
| | | | | | This realigns this code with code from radeon. Reviewed-by: Chia-I Wu <[email protected]>
* virgl/drm: cleanup buffer from handle creation (v2)Dave Airlie2019-04-252-15/+13
| | | | | | | | This cleans up and realigns this code with what is in radeon v2: fix names->handles (Lepton Wu) Reviewed-by: Chia-I Wu <[email protected]>
* winsys/amdgpu: clean up and remove nonsensical assertionMarek Olšák2019-04-231-2/+1
| | | | | | | | The assertion considers max_dw from the current IB in the chain, but big_ib_buffer is a buffer for the next IB, which can be smaller. Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: enable chaining for compute IBsMarek Olšák2019-04-231-6/+6
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: reorder chunks, make BO_HANDLES first, IB and FENCE lastMarek Olšák2019-04-231-19/+17
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: make IBs writable and expose their addressMarek Olšák2019-04-231-1/+3
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* ac: add radeon_info::marketing_name, replacing the winsys callbackMarek Olšák2019-04-231-7/+0
| | | | | Tested-by: Dieter Nützel <[email protected]> Acked-by: Nicolai Hähnle <[email protected]>
* iris: Add mechanism for iris-specific driconf optionsKenneth Graunke2019-04-222-3/+5
| | | | | | Based on Nicolai's 0f8c5de8690e7c87aa2e24383065efaca7e6fe78. Reviewed-by: Dylan Baker <[email protected]>
* lima: add Android buildIcenowy Zheng2019-04-211-0/+32
| | | | | | | | | Currently only meson build supported is added for lima driver. Add Android build support for lima. Signed-off-by: Icenowy Zheng <[email protected]> Acked-by: Qiang Yu <[email protected]>
* virgl/vtest: bump up protocol version + support encoded transfersGurchetan Singh2019-04-183-3/+12
| | | | | | | | This more accurately reflects what the drm winsys does. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: wait after issuing a transfer getGurchetan Singh2019-04-181-2/+3
| | | | | | | | | | | | Otherwise, there's artifacts when running Unigine Valley with protocol version 2. We can get away with not waiting for most buffers, but let's be conservative. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: modify sending and receiving data for shared memoryGurchetan Singh2019-04-181-4/+35
| | | | | | | | We need to copy the shared memory region to the display target. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: receive and handle shared memory fdGurchetan Singh2019-04-182-7/+55
| | | | | | | | | | | | | | | | The only tricky part is with protocol 0 we can either have a display target or resource backing store. With protocol 2 we can have both. Make the map/unmap functions only deal with the resource backing store. v2: Handle MSAA texture case. v3: spelling v4: Fix dangling else (@prak) v5: mmap --> os_mmap (@prak) + added comments (@gerddie) Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: plumb support for shared memoryGurchetan Singh2019-04-183-6/+10
| | | | | | Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: add utilities for receiving fdsGurchetan Singh2019-04-181-0/+43
| | | | | | | | v2: recieve --> receive (airlied@) Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: execute a transfer_get when flushing the front bufferGurchetan Singh2019-04-181-22/+21
| | | | | | | | | | | | This just moves everything to a helper function -- "flush_front_buffer" will be used later. virgl_vtest_resource_map / virgl_vtest_resource_unmap already take care to map the display target. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* winsys/amdgpu: don't set GTT with GDS & OA placements on APUsMarek Olšák2019-04-161-9/+11
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* virgl: fix fence fd version checkChia-I Wu2019-04-151-2/+2
| | | | | | | Fixes: d1a1c21e762 ("virgl: native fence fd support") Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: introduce virgl_drm_fenceChia-I Wu2019-04-152-45/+115
| | | | | | | | | virgl_drm_fence can wrap either a fence fd or a virgl_hw_res. Because a fence fd is cheaper than a virgl_hw_res, we use it whenever it is available. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-28/+42
| | | | | | | | | | | | | | Fence fds are cheaper than resources. We want to let winsys make the decision and use fence fds whenever they are supported. This commit prepares the work. For the moment, we create a resource _and_ a fence fd when supports_fences is true. This will be fixed such that we create a resource _or_ a fence fd. (And because of a version check bug that we will fix later, supports_fences is actually never true). Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-153-12/+25
| | | | | | | | It does not need help from the driver. This also fixes one issue where the fence is ignored when the transfer queue is full. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Delete autotoolsDylan Baker2019-04-1519-606/+0
| | | | | | | | | | Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Acked-by: Marek Olšák <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Matt Turner <[email protected]>
* ac: Move has_local_buffers disable to radeonsi.Bas Nieuwenhuizen2019-04-151-0/+4
| | | | | | | | | | | | | | In radv we had a separate flag to actually use it + an env option to experimentally use it. The common code setting has_local_buffers to false of course broke that experimental option. Also the "enable on APU" did not make sense for RADV as it is still disabled by default. Fixes: b21a4efb553 "radv/winsys: allow local BOs on APUs" Reviewed-by: Samuel Pitoiset <[email protected]>
* kmsro: Add lima renderonly supportRob Herring2019-04-112-0/+14
| | | | | | | | | Enable using lima for KMS renderonly. This still needs KMS driver name mapping to kmsro to be used automatically. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* gallium: add lima driverQiang Yu2019-04-113-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - use renamed util_dynarray_grow_cap - use DEBUG_GET_ONCE_FLAGS_OPTION for debug flags - remove DRM_FORMAT_MOD_ARM_AGTB_MODE0 usage - compute min/max index in driver v3: - fix plbu framebuffer state calculation - fix color_16pc assemble - use nir_lower_all_source_mods for lowering neg/abs/sat - use float arrary for static GPU data - add disassemble comment for static shader code - use drm_find_modifier v4: - use lima_nir_lower_uniform_to_scalar v5: - remove nir_opt_global_to_local when rebase Cc: Rob Clark <[email protected]> Cc: Alyssa Rosenzweig <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Andreas Baierl <[email protected]> Signed-off-by: Arno Messiaen <[email protected]> Signed-off-by: Connor Abbott <[email protected]> Signed-off-by: Erico Nunes <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]> Signed-off-by: Koen Kooi <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: marmeladema <[email protected]> Signed-off-by: Paweł Chmiel <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Rohan Garg <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Qiang Yu <[email protected]>
* radeonsi: add support for displayable DCC for 1 RB chipsMarek Olšák2019-04-041-0/+8
| | | | This is the simpler codepath - just disable RB and pipe alignment for DCC.
* panfrost: Remove support for legacy kernelsAlyssa Rosenzweig2019-04-033-14/+5
| | | | | | | | | | | | | | Previously, there was minimal support for interoperating with legacy kernels (reusing kernel modules originally designed for proprietary legacy userspaces, rather than for upstream-friendly free software stacks). Now that the Panfrost kernel is stabilising, this commit drops the legacy code path. Panfrost users need to use a modern, mainline kernel supporting the Panfrost kernel driver from this commit forward. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* virgl: close drm fd when destroying virgl screen.Lepton Wu2019-04-021-0/+1
| | | | | | | | This fd was create in virgl_drm_screen_create and should be closed in virgl_drm_screen_destroy. Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: use uint16_t mask instead of separate booleansGurchetan Singh2019-03-132-80/+83
| | | | | | | This should save some space. Suggested-by: Erik Faye-Lund <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/winsys/kms: fix incomplete type compilation failureBrian Paul2019-03-111-0/+1
| | | | | | | | | | Fixes: ../src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c: In function ‘kms_sw_displaytarget_from_handle’: ../src/gallium/winsys/sw/kms-dri/kms_dri_sw_winsys.c:402:60: error: dereferencing pointer to incomplete type ‘const struct pipe_resource’ templ->format, ^ Reviewed-by: Mathias Fröhlich <[email protected]>
* drisw: fix incomplete type compilation failureBrian Paul2019-03-111-0/+1
| | | | | | | | | | Fixes: ../src/gallium/winsys/sw/dri/dri_sw_winsys.c: In function ‘dri_sw_displaytarget_display’: ../src/gallium/winsys/sw/dri/dri_sw_winsys.c:255:39: error: dereferencing pointer to incomplete type ‘struct pipe_box’ offset = dri_sw_dt->stride * box->y; ^ Reviewed-by: Mathias Fröhlich <[email protected]>
* winsys/svga: use new pb_usage_flags enum typeBrian Paul2019-03-083-6/+26
| | | | | | | | | And add a comment that we're implicitly converting PIPE_TRANSFER_ flags to PB_USAGE_ flags in one place. And statically assert that the enum values match. Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
* virgl/vtest: deprecate protocol version 1Gurchetan Singh2019-02-274-43/+23
| | | | | | | | | | | | | | | | | This is a partial revert of 9d81cd ("virgl: Pass resource size and transfer offsets"). The adjustments made in the client code means there's various mismatches when transfering data. Let's fallback to protocol version 0 and deprecate protocol version 1. We can still use the protocol version 1 slots for a shared memory transfer mechanism later. Fixes: dEQP-GLES31.functional.copy_image.mixed.viewclass_128_bits_mixed.*_renderbuffer Reviewed-By: Gert Wollny <[email protected]>
* iris: add Android buildTapani Pälli2019-02-212-0/+43
| | | | | | | | | | | | | | | Note that at least following additional libs/components require changes since they refer to BOARD_GPU_DRIVERS variable which is used to select the driver: - mixins - minigbm - libdrm - drm_gralloc v2: (feedback by Gustaw Smolarczyk) Fix trailing \ in a few cases Signed-off-by: Tapani Pälli <[email protected]>
* iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.Kenneth Graunke2019-02-213-0/+94
| | | | | | | | | | | | | | | This commit introduces a new Gallium driver for Intel Gen8+ GPUs, named 'iris_dri.so' after the hardware. Developed by: - Kenneth Graunke (overall driver) - Dave Airlie (shaders, conditional render, overflow query, Gen8 port) - Chris Wilson (fencing, pinned memory, ...) - Jordan Justen (compute shaders) - Jason Ekstrand (image load store) - Caio Marcelo de Oliveira Filho (tessellation control passthrough) - Rafael Antognolli (auxiliary buffer fixes) - The rest of the i965 contributors and the Mesa community
* virgl: make winsys modifications for encoded transfersGurchetan Singh2019-02-153-3/+16
| | | | | | | | | | | | | The idea is to have two command buffers: 1) One for transfers 2) One for commands, which can include transfers At flush time, (2) will be filled. Otherwise, (1) will be used to submit transfers if there are enough of them. v2: Pass size directly to cmd_buf_create (@gerddie) Reviewed-by: Gert Wollny <[email protected]>
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-146-6/+6
| | | | | | | | | There was an issue recently caused by the system header being included by mistake, so let's just get rid of this include path and always explicitly #include "drm-uapi/FOO.h" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
* winsys/amdgpu: cs_check_space sets the minimum IB size for future IBsMarek Olšák2019-02-112-2/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: clean up IB buffer size computationMarek Olšák2019-02-111-8/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: remove occurence of INDIRECT_BUFFER_CONSTMarek Olšák2019-02-111-2/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: use a separate fence list for syncobjsMarek Olšák2019-02-112-17/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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