| Commit message (Collapse) | Author | Age | Files | Lines |
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we need to know if the back is tiled so we can blit from it properly.
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Would try to destroy radeon->cman, radeon->kman both which were still
NULL.
Signed-off-by: Dave Airlie <[email protected]>
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Avoid having object ending up in dead list of dirty object.
Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Since flush rework there could be only one relocation per
register in a block.
Signed-off-by: Jerome Glisse <[email protected]>
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Got a speed up by tracking the dirty blocks in a seperate list instead of looping through all blocks. This version should work with block that get their dirty state disabled again and I added a dirty check during the flush as some blocks were already dirty.
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Flush read cache before writting register. Track flushing inside
of a same cs and avoid reflushing same bo if not necessary. Allmost
properly force flush if bo rendered too and then use as a texture
in same cs (missing pipeline flush dunno if it's needed or not).
Signed-off-by: Jerome Glisse <[email protected]>
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Allow fast lookup of relocation information & id which
was a CPU time consumming operation.
Signed-off-by: Jerome Glisse <[email protected]>
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if we know the bo has gone not busy, no need to add another bo wait
thanks to Andre (taiu) on irc for pointing this out.
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since we plan on using dx10 constant buffers everywhere.
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we don't use this since constant buffers are now being used on all gpus.
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When we go to do a lot of bos in one draw like constant bufs we need
to avoid bouncing off the busy ioctl, this mitigates by backing off
on busy bos for a short amount of times.
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this just keeps a list of bos submitted together, and uses them to decide
bo busy state for the whole group.
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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no wonder it was slow, the code is deliberately forcing stuff into GTT,
we used to have domain management but it seems to have disappeared.
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this function was taking quite a lot of pointless CPU.
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this sets up a single loop constant like r600c does.
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just a typo in the register headers.
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this gets rid of lots of the instability on evergreen,
which isn't surprising since it really broken not to flush caches.
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we'll need this for color tiling on evergreen.
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These need to be emitted, we also need them to do proper vtx start,
instead of abusing index offset.
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Save a lot of call into the kernel and thus improve performances.
Signed-off-by: Jerome Glisse <[email protected]>
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This avoid to overcount the number of dwords we need and
thus avoid maximazation of cs buffer use.
Signed-off-by: Jerome Glisse <[email protected]
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Remove duplicated include.
Signed-off-by: Brian Paul <[email protected]>
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mainly remove 2 suffix from function names
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Signed-off-by: Jerome Glisse <[email protected]>
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Fixes SCons build.
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Signed-off-by: Jerome Glisse <[email protected]>
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Lot of clean can now happen.
Signed-off-by: Jerome Glisse <[email protected]>
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Instead of creating group of register use a hash table
to lookup into which block each register belongs. This
simplify code a bit.
Signed-off-by: Jerome Glisse <[email protected]
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