| Commit message (Collapse) | Author | Age | Files | Lines |
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Conflicts:
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/r600/r600_state_inlines.h
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Fixes valgrind warning.
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r600_context_flush().
Signed-off-by: Henri Verbeet <[email protected]>
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When switching channels with xine it sometimes happens that xine
destroys the drawable before we get a chance to call
DRI2DestroyDrawable, resulting in an x error.
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Conflicts:
configure.ac
src/gallium/drivers/r600/r600_state_inlines.h
src/gallium/tests/trivial/Makefile
src/gallium/winsys/g3dvl/dri/XF86dri.c
src/gallium/winsys/g3dvl/dri/driclient.c
src/gallium/winsys/g3dvl/dri/driclient.h
src/gallium/winsys/g3dvl/dri/xf86dri.h
src/gallium/winsys/g3dvl/dri/xf86dristr.h
src/gallium/winsys/r600/drm/r600_bo.c
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Considering fbdev as an in-kernel window system,
- opening a device opens a connection
- there is only one window: the framebuffer
- fb_var_screeninfo decides window position, size, and even color format
- there is no pixmap
Now EGL is built on top of this window system. So we should have
- the fd as the handle of the native display
- reject all but one native window: NULL
- no pixmap support
modeset support is still around, but it should be removed soon.
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Field is encoded:
0 = 4 banks
1 = 8 banks
2 = 16 banks
Signed-off-by: Alex Deucher <[email protected]>
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v2: Incorporated feedback from Jakob Bornecrantz.
Signed-off-by: Daniel Vetter <[email protected]>
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It's a special reg and does not require a flush like
the other CONFIG regs.
Signed-off-by: Alex Deucher <[email protected]>
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CONFIG regs (byte offsets 0x8000-0xac00) are single state and the pipeline
must be flushed and hw idle when they are changed. Border color regs
are in the CONFIG range and this is why a flush is required when changing
them. CONTEXT regs (byte offset 0x28000+) are multi-state and those do
not require flushes when changing them.
Signed-off-by: Alex Deucher <[email protected]>
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Ideally we'd have a compiler and register spilling and all that
but this is good enough for now to avoid the gpu hang in piglit,
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined
on r600/r700 cards.
based on r600c patch
Andre Maasikas <[email protected]>
r600c: bump sq gpr resources if a shader needs more than default
Signed-off-by: Dave Airlie <[email protected]>
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Conflicts:
src/gallium/tests/unit/u_format_test.c
src/gallium/winsys/r600/drm/r600_hw_context.c
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This makes sure these are enabled even if set to 0 at startup.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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Evergreen can do this as well as cayman, so we should enable it.
This fixes a gpu lockup with
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined.shader_test
I need to add a better workaround for r600/r700.
Signed-off-by: Dave Airlie <[email protected]>
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This caused a loop in some tests.
Signed-off-by: Dave Airlie <[email protected]>
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We weren't emitting the SQ setup regs at all which really is
fail.
When a state is always enabled we need to add it to the dirty list
as well.
Signed-off-by: Dave Airlie <[email protected]>
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This just moves the messy stuff out of the fast path,
and leaves the fast-case in the fast path.
Signed-off-by: Dave Airlie <[email protected]>
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Since resources don't generally vary in size, this splits
the emit path, it also takes into a/c that texture and vertex resources
have different number of relocs, and avoids emitting the extra
reloc for vertex resources.
Signed-off-by: Dave Airlie <[email protected]>
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Exit this loop early to avoid pointless iterations later.
Move the resource bos to the first two regs, it actually
doesn't matter which regs we use for this in resource land.
Signed-off-by: Dave Airlie <[email protected]>
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We were always re-emitting lots of unnecessary changes here,
avoid doing that.
Signed-off-by: Dave Airlie <[email protected]>
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This relies on the reference member being first, so document it.
Signed-off-by: Dave Airlie <[email protected]>
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We drop them when we reference the new objects in the next line.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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query->num_results already has the size in dwords of the query
buffer. There no need to multiply again. We were reading past
the end of the buffer, resulting in reading garbage.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=37028
agd5f: clarify the comment.
Signed-off-by: Alex Deucher <[email protected]>
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Not sure why these were included originally.
Signed-off-by: Alex Deucher <[email protected]>
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According to the hw documentation, the driver needs to:
- allocate 128 bits for each possible DB
- clear the 128 bits for each possible DB
- write 1 to bits 127 and 63 for upper DBs that don't
exist on a particular asic
Previously we were only doing these steps if the
asic had less than the max possible DBs.
Signed-off-by: Alex Deucher <[email protected]>
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Use r300_pci_ids.h instead.
Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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This just reduces code size a bit for this chunk.
Signed-off-by: Dave Airlie <[email protected]>
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At the end of flushing we were scanning over 450 blocks
with generally about 50 enabled. This reduces the scanning
to just the list of enabled blocks.
Signed-off-by: Dave Airlie <[email protected]>
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There isn't much point taking the overhead of range/block lookups on resources
we aren't going to be getting resource registers at wierd offsets.
Signed-off-by: Dave Airlie <[email protected]>
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This just splits this function up as pre-cursor to reusing
the internals of it.
Signed-off-by: Dave Airlie <[email protected]>
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resource setting could be a fair bit more lightweight,
this patch just separates the resource structs from the standard
reg tracking structs in the driver, later patches will improve
the winsys.
Signed-off-by: Dave Airlie <[email protected]>
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