aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys/virgl
Commit message (Collapse)AuthorAgeFilesLines
* meson: inline `inc_common`Eric Engestrom2020-03-283-3/+3
| | | | | | | | | Let's make it clear what includes are being added everywhere, so that they can be cleaned up. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
* util: don't include p_defines.h and u_pointer.h from galliumMarek Olšák2020-03-271-0/+1
| | | | | | | It's a mess, but this is what I arrived at. Reviewed-by: Timothy Arceri <[email protected] Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4324>
* gallium/hash_table: remove some function wrappersMarek Olšák2020-02-261-10/+10
| | | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
* gallium/hash_table: turn it into a wrapper around util/hash_tableMarek Olšák2020-02-262-4/+4
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
* gallium/hash_table: consolidate hash tables with FD keysMarek Olšák2020-02-261-23/+1
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
* gallium/hash_table: consolidate hash tables with pointer keysMarek Olšák2020-02-261-14/+2
| | | | | Reviewed-by: Kristian H. Kristensen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3722>
* virgl: Use align_free for align_malloc allocated bufferSzymon Andrzejuk2020-02-011-1/+1
| | | | | Signed-off-by: Szymon Andrzejuk <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl/drm: update UAPIGurchetan Singh2020-01-102-175/+1
| | | | | | | This seems to compile. Header copied over from drm-misc-next 7da5492739db. Acked-by: Eric Engestrom <[email protected]>
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-143-3/+3
| | | | | | | | | | | | | | | To make PIPE_FORMATs usable from non-gallium parts of Mesa, I want to move their helpers out of gallium. Since u_format used util_copy_rect(), I moved that in there, too. I've put it in a separate directory in util/ because it's a big chunk of related code, and it's not clear to me whether we might want it as a separate library from libmesa_util at some point. Closes: #1905 Acked-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* util: remove LIST_DEL macroTimothy Arceri2019-10-281-2/+2
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_ADDTAIL macroTimothy Arceri2019-10-281-1/+1
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* util: remove LIST_INITHEAD macroTimothy Arceri2019-10-281-1/+1
| | | | | | | Just use the inlined function directly. The macro was replaced with the function in ebe304fa540f. Reviewed-by: Eric Engestrom <[email protected]>
* virgl: honor winsys supplied metadataGurchetan Singh2019-10-021-1/+6
| | | | | | | | | | | To truly to do this correctly, we'll have to fix the discrepancy between drm_virtgpu_3d_transfer_to_host and virtio_gpu_transfer_host_3d. However, this is a good starting point. Since virtio-gpu only supports self-import and export, this should be fine. Let's only do WINSYS_HANDLE_TYPE_FD for this currently. Reviewed by: Robert Tarasov <[email protected]>
* virgl: modify resource_create_from_handle(..) callbackGurchetan Singh2019-10-021-1/+5
| | | | | | | This commit makes no functional changes, just adds the revelant plumbing. Reviewed by: Robert Tarasov <[email protected]>
* virgl: remove stride from virgl_hw_resGurchetan Singh2019-10-022-3/+0
| | | | | | | It's not used anywhere, and stride isn't really an intrinsic property of a GEM buffer. Reviewed by: Robert Tarasov <[email protected]>
* virgl: Remove wrong EAGAIN handling for drmIoctlLepton Wu2019-09-181-3/+3
| | | | | | | | | | | drmIoctl handles EAGAIN itself and actually it always return -1 on errors. Remove the wrong handling of its return value. Also, print a warning when it fails. v2: - use _debug_printf instead of fprintf (Gurchetan Singh) Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (v1)
* virgl: replace fprintf with _debug_printfLepton Wu2019-09-141-5/+5
| | | | | Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-08-262-2/+2
| | | | | | | | | | | | | | | | | | The virgl formats are fixed in time snapshots of the gallium ones, we just need to provide a translation table between them when we enter the hardware. This fixes a regression since Eric renumbered the gallium table. Fixes: c45c33a5a2 (gallium: Remove manual defining of PIPE_FORMAT enum values.) Bugzilla: https://bugs.freedesktop.org/111454 v1 by Dave Airlie <[email protected]> v2: virgl: Add a number of formats to the table that are used, e.g. for vertex attributes v3: cover some more missing formats from a piglit run Signed-off-by: Gert Wollny <[email protected]>
* virgl: drop unused format fieldDave Airlie2019-08-262-2/+0
|
* meson: Test for program_invocation_nameMatt Turner2019-07-301-1/+1
| | | | | | | | program_invocation_name and program_invocation_short_name are both GNU extensions. I don't believe one can exist without the other, so only check for program_invocation_name. Reviewed-by: Eric Engestrom <[email protected]>
* android: virgl: remove unnecessary LOCAL_C_INCLUDESChih-Wei Huang2019-07-102-4/+0
| | | | | | | The path could be imported automatically. Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Mauro Rossi <[email protected]>
* android: fix typo LOCAL_EXPORT_C_INCLUDESChih-Wei Huang2019-06-291-1/+1
| | | | | | | Should be LOCAL_EXPORT_C_INCLUDE_DIRS. Signed-off-by: Chih-Wei Huang <[email protected]> Tested-by: Mauro Rossi <[email protected]>
* android: virgl: fix libmesa_winsys_virgil_common build and dependenciesMauro Rossi2019-06-212-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following building errors and resolves Bug 110922 Fixes gallium_dri target missing symbols at linking. external/mesa/src/gallium/winsys/virgl/drm/Android.mk: error: libmesa_winsys_virgl (STATIC_LIBRARIES android-x86_64) missing libmesa_winsys_virgl_common (STATIC_LIBRARIES android-x86_64) ... external/mesa/src/gallium/winsys/virgl/vtest/Android.mk: error: libmesa_winsys_virgl_vtest (STATIC_LIBRARIES android-x86_64) missing libmesa_winsys_virgl_common (STATIC_LIBRARIES android-x86_64) ... build/core/main.mk:728: error: exiting from previous errors. In file included from external/mesa/src/gallium/winsys/virgl/vtest/virgl_vtest_socket.c:34: external/mesa/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.h:35:10: fatal error: 'virgl_resource_cache.h' file not found ^~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. In file included from external/mesa/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.c:32: external/mesa/src/gallium/winsys/virgl/vtest/virgl_vtest_winsys.h:35:10: fatal error: 'virgl_resource_cache.h' file not found #include "virgl_resource_cache.h" ^~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Fixes: b18f09a ("virgl: Introduce virgl_resource_cache") Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Tested-by: Clayton Craft <[email protected]>
* gallium/virgl: Add code path for virgl to read driconfGert Wollny2019-06-202-3/+3
| | | | | | | | | | | | This works only for the drm variant of virgl and not for the vtest variant. v2: Rebase, replace the configuration query function by a pointer to the configuration data. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (v1) Reviewed-by: Gurchetan Singh <[email protected]>
* virgl: add resource_reference to virgl_winsysChia-I Wu2019-06-172-30/+17
| | | | | | | | It works similar to pipe_resource_reference but is for virgl_hw_res. It can also replace resource_unref. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* virgl: Return immediately when finding a compatible resource in the cacheAlexandros Frantzis2019-06-141-25/+14
| | | | | | | | | | | | | | When searching for resources in the cache, we previously released all expired resources even after having found a compatible resource. This commit changes this behavior to return immediately when finding a compatible resource, so that the operation finishes more quickly. This moves more of the burden of releasing expired resources to cache addition, which, since it happens at resource destruction time, it's less time critical. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Use virgl_resource_cache in the vtest winsysAlexandros Frantzis2019-06-144-122/+44
| | | | | | | | Replace the cache implementation in the vtest winsys with virgl_resource_cache. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Use virgl_resource_cache in the drm winsysAlexandros Frantzis2019-06-144-123/+44
| | | | | | | | Replace the cache implementation in the drm winsys with virgl_resource_cache. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Introduce virgl_resource_cacheAlexandros Frantzis2019-06-145-0/+330
| | | | | | | | Introduce a resource cache implementation that can be used by any virgl winsys backend. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: consider newly created resources idleChia-I Wu2019-06-111-6/+8
| | | | | | | | | A newly created resource can be regarded as idle. We don't care if the RESOURCE_CREATE command has been retired, unless it is used for fencing. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* virgl: make resource_wait/resource_is_busy cheaperChia-I Wu2019-06-112-0/+27
| | | | | | | | | | | | | The round trip to the kernel is expensive. Add a local cache to avoid it when possible. There is a race condition when two contexts access the same resource at the same time (e.g., ctx1 submits a cmdbuf that accesses a resource while ctx2 maps the resource). But that is probably an app bug in the first place. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* virgl: add virgl_drm_{alloc,free,clear}_res_listChia-I Wu2019-06-111-17/+42
| | | | | | | | Helpers to work with resource list. virgl_drm_release_all_res is removed. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* virgl: do not cache external resourcesChia-I Wu2019-06-112-1/+10
| | | | | | | | We should not reuse a resource for other purposes when it can still be accessed by another process or device. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Alexandros Frantzis <[email protected]>
* virgl: Make VIRGL_BIND_STAGING resources cacheableAlexandros Frantzis2019-06-072-2/+4
| | | | | | | | This could help performance when trying to recreate such resources for copy transfers. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Deduplicate checks for resource cachingAlexandros Frantzis2019-06-074-20/+14
| | | | | | | | | | | Also fixes a missed check for VIRGL_BIND_CUSTOM in one of the duplicate code snippets. Note that legacy fences also use VIRGL_BIND_CUSTOM, but we ensured they don't go through the cache in the previous commit. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: Don't try to use cached resources for legacy fencesAlexandros Frantzis2019-06-072-6/+12
| | | | | | | | Resources for fences should not be from the cache, since we are basing the fence status on the resource creation busy status. Signed-off-by: Alexandros Frantzis <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* virgl: export resource_is_busy from winsysChia-I Wu2019-05-062-11/+14
| | | | | Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* virgl/drm: insert correct handles into the table. (v3)Dave Airlie2019-04-251-1/+4
| | | | | | | | | | This inserts a handle for the flink name and a handle the correct gem handle for the bo. v2: fix handles/names confusion (Lepton Wu) v3: set flink name correctly (Lepton Wu) Reviewed-by: Chia-I Wu <[email protected]>
* virgl/drm: handle flink name better.Dave Airlie2019-04-252-20/+11
| | | | | | This realigns this code with code from radeon. Reviewed-by: Chia-I Wu <[email protected]>
* virgl/drm: cleanup buffer from handle creation (v2)Dave Airlie2019-04-252-15/+13
| | | | | | | | This cleans up and realigns this code with what is in radeon v2: fix names->handles (Lepton Wu) Reviewed-by: Chia-I Wu <[email protected]>
* virgl/vtest: bump up protocol version + support encoded transfersGurchetan Singh2019-04-183-3/+12
| | | | | | | | This more accurately reflects what the drm winsys does. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: wait after issuing a transfer getGurchetan Singh2019-04-181-2/+3
| | | | | | | | | | | | Otherwise, there's artifacts when running Unigine Valley with protocol version 2. We can get away with not waiting for most buffers, but let's be conservative. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: modify sending and receiving data for shared memoryGurchetan Singh2019-04-181-4/+35
| | | | | | | | We need to copy the shared memory region to the display target. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: receive and handle shared memory fdGurchetan Singh2019-04-182-7/+55
| | | | | | | | | | | | | | | | The only tricky part is with protocol 0 we can either have a display target or resource backing store. With protocol 2 we can have both. Make the map/unmap functions only deal with the resource backing store. v2: Handle MSAA texture case. v3: spelling v4: Fix dangling else (@prak) v5: mmap --> os_mmap (@prak) + added comments (@gerddie) Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: plumb support for shared memoryGurchetan Singh2019-04-183-6/+10
| | | | | | Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: add utilities for receiving fdsGurchetan Singh2019-04-181-0/+43
| | | | | | | | v2: recieve --> receive (airlied@) Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl/vtest: execute a transfer_get when flushing the front bufferGurchetan Singh2019-04-181-22/+21
| | | | | | | | | | | | This just moves everything to a helper function -- "flush_front_buffer" will be used later. virgl_vtest_resource_map / virgl_vtest_resource_unmap already take care to map the display target. Signed-off-by: Gurchetan Singh <[email protected]> Reviewed-By: Gert Wollny <[email protected]> Reviewed-By: Piotr Rak <[email protected]>
* virgl: fix fence fd version checkChia-I Wu2019-04-151-2/+2
| | | | | | | Fixes: d1a1c21e762 ("virgl: native fence fd support") Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: introduce virgl_drm_fenceChia-I Wu2019-04-152-45/+115
| | | | | | | | | virgl_drm_fence can wrap either a fence fd or a virgl_hw_res. Because a fence fd is cheaper than a virgl_hw_res, we use it whenever it is available. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-28/+42
| | | | | | | | | | | | | | Fence fds are cheaper than resources. We want to let winsys make the decision and use fence fds whenever they are supported. This commit prepares the work. For the moment, we create a resource _and_ a fence fd when supports_fences is true. This will be fixed such that we create a resource _or_ a fence fd. (And because of a version check bug that we will fix later, supports_fences is actually never true). Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 05:50:11 +0000