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path: root/src/gallium/winsys/virgl
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* virgl: honor winsys supplied metadataGurchetan Singh2019-10-021-1/+6
* virgl: modify resource_create_from_handle(..) callbackGurchetan Singh2019-10-021-1/+5
* virgl: remove stride from virgl_hw_resGurchetan Singh2019-10-022-3/+0
* virgl: Remove wrong EAGAIN handling for drmIoctlLepton Wu2019-09-181-3/+3
* virgl: replace fprintf with _debug_printfLepton Wu2019-09-141-5/+5
* virgl: fix format conversion for recent gallium changes.Dave Airlie2019-08-262-2/+2
* virgl: drop unused format fieldDave Airlie2019-08-262-2/+0
* meson: Test for program_invocation_nameMatt Turner2019-07-301-1/+1
* android: virgl: remove unnecessary LOCAL_C_INCLUDESChih-Wei Huang2019-07-102-4/+0
* android: fix typo LOCAL_EXPORT_C_INCLUDESChih-Wei Huang2019-06-291-1/+1
* android: virgl: fix libmesa_winsys_virgil_common build and dependenciesMauro Rossi2019-06-212-0/+4
* gallium/virgl: Add code path for virgl to read driconfGert Wollny2019-06-202-3/+3
* virgl: add resource_reference to virgl_winsysChia-I Wu2019-06-172-30/+17
* virgl: Return immediately when finding a compatible resource in the cacheAlexandros Frantzis2019-06-141-25/+14
* virgl: Use virgl_resource_cache in the vtest winsysAlexandros Frantzis2019-06-144-122/+44
* virgl: Use virgl_resource_cache in the drm winsysAlexandros Frantzis2019-06-144-123/+44
* virgl: Introduce virgl_resource_cacheAlexandros Frantzis2019-06-145-0/+330
* virgl: consider newly created resources idleChia-I Wu2019-06-111-6/+8
* virgl: make resource_wait/resource_is_busy cheaperChia-I Wu2019-06-112-0/+27
* virgl: add virgl_drm_{alloc,free,clear}_res_listChia-I Wu2019-06-111-17/+42
* virgl: do not cache external resourcesChia-I Wu2019-06-112-1/+10
* virgl: Make VIRGL_BIND_STAGING resources cacheableAlexandros Frantzis2019-06-072-2/+4
* virgl: Deduplicate checks for resource cachingAlexandros Frantzis2019-06-074-20/+14
* virgl: Don't try to use cached resources for legacy fencesAlexandros Frantzis2019-06-072-6/+12
* virgl: export resource_is_busy from winsysChia-I Wu2019-05-062-11/+14
* virgl/drm: insert correct handles into the table. (v3)Dave Airlie2019-04-251-1/+4
* virgl/drm: handle flink name better.Dave Airlie2019-04-252-20/+11
* virgl/drm: cleanup buffer from handle creation (v2)Dave Airlie2019-04-252-15/+13
* virgl/vtest: bump up protocol version + support encoded transfersGurchetan Singh2019-04-183-3/+12
* virgl/vtest: wait after issuing a transfer getGurchetan Singh2019-04-181-2/+3
* virgl/vtest: modify sending and receiving data for shared memoryGurchetan Singh2019-04-181-4/+35
* virgl/vtest: receive and handle shared memory fdGurchetan Singh2019-04-182-7/+55
* virgl/vtest: plumb support for shared memoryGurchetan Singh2019-04-183-6/+10
* virgl/vtest: add utilities for receiving fdsGurchetan Singh2019-04-181-0/+43
* virgl/vtest: execute a transfer_get when flushing the front bufferGurchetan Singh2019-04-181-22/+21
* virgl: fix fence fd version checkChia-I Wu2019-04-151-2/+2
* virgl: introduce virgl_drm_fenceChia-I Wu2019-04-152-45/+115
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-28/+42
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-153-12/+25
* Delete autotoolsDylan Baker2019-04-152-69/+0
* virgl: close drm fd when destroying virgl screen.Lepton Wu2019-04-021-0/+1
* virgl: use uint16_t mask instead of separate booleansGurchetan Singh2019-03-132-80/+83
* virgl/vtest: deprecate protocol version 1Gurchetan Singh2019-02-274-43/+23
* virgl: make winsys modifications for encoded transfersGurchetan Singh2019-02-153-3/+16
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-141-1/+1
* virgl/vtest: Use default socket name from protocol headerJakob Bornecrantz2019-01-031-3/+1
* virgl/vtest: fix front buffer flush with protocol version 0.Dave Airlie2018-12-281-1/+1
* virgl,vtest: Initialize return valueGert Wollny2018-11-281-1/+1
* virgl: fix vtest regression since fencing changes.Dave Airlie2018-11-191-0/+1
* virgl: Use file descriptor instead of un-allocated objectGert Wollny2018-11-191-1/+1
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