| Commit message (Collapse) | Author | Age | Files | Lines |
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This fixes random crashes of: piglit/glx-multithread-shader-compile.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Both contained the GEM flink name.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Christian König <[email protected]>
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Also rewrite the comment for it to be readable and reorder the code.
Reviewed-by: Alex Deucher <[email protected]>
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This allows retrieving the existing BO and incrementing its reference count,
instead of creating a separate winsys representation for it, when the kernel
reports that the BO was already assigned a virtual memory address.
This fixes problems with XWayland using radeonsi and the
xf86-video-wlglamor driver, which calls GEM flink outside of the radeon
winsys code and creates BOs from the flinked names using the same DRM file
descriptor.
Reviewed-by: Marek Olšák <[email protected]>
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This updates all occurences of cs_add_reloc.
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The cs_add_reloc change is commented out not to break compilation.
The highest priority of all cs_add_reloc calls is send to the kernel.
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This reverts commit 67aef6dafa29fed008ea6065c425a6a92a651be9.
It caused GPU hangs. The question is why.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75900
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Requested by Marek.
Reviewed-by: Marek Olšák <[email protected]>
Cc: "10.1" <[email protected]>
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In some situations, it may be desirable to bypass the cache at buffer
creation but to insert the buffer in the cache at buffer destruction.
One such situation is where we already have a kernel representation of a
buffer that we want to use, but we also want to insert it in the cache when
it's freed up.
Signed-off-by: Thomas Hellstrom <[email protected]>
Reviewed-by: José Fonseca <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Cc: "10.1" <[email protected]>
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In some situations it's important to restrict the sizes of buffers that the
cached buffer manager is allowed to return
Signed-off-by: Thomas Hellstrom <[email protected]>
Cc: "10.1" <[email protected]>
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v2: add fw version query
v3: add README.VCE
v4: avoid error msg when kernel doesn't support it
Signed-off-by: Christian König <[email protected]>
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Note that PIPE_ROUTINE now returns an int.
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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NUM_BANKS is not constant on CIK.
Reviewed-by: Alex Deucher <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
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Signed-off-by: Niels Ole Salscheider <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
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If we assume that all buffers allocated by the DDX are scanout, a new flag
that says "this is not scanout" has to be added to support the non-scanout
buffers and maintain backward compatibility.
This fixes bad rendering on Wayland.
The flag is defined as:
#define RADEON_TILING_R600_NO_SCANOUT RADEON_TILING_SWAP_16BIT
AFAIK, RADEON_TILING_SWAP_16BIT is not used on SI.
Reviewed-by: Michel Dänzer <[email protected]>
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v2: Fix transliteration of lseek arguments
Ignore busy return from RADEON_GEM_BUSY ioctl; we're only after the domain
Signed-off-by: Christopher James Halse Rogers <[email protected]>
Reviewed-by: Thomas Hellstrom <[email protected]>
Signed-off-by: Maarten Lankhorst <[email protected]>
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It's a map of GEM name->bo, so identify it as such
Signed-off-by: Christopher James Halse Rogers <[email protected]>
Reviewed-by: Thomas Hellstrom <[email protected]>
Signed-off-by: Maarten Lankhorst <[email protected]>
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Signed-off-by: Christopher James Halse Rogers <[email protected]>
Reviewed-by: Thomas Hellstrom <[email protected]>
Signed-off-by: Maarten Lankhorst <[email protected]>
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The alignment of a virtual memory area must always be at least 4096 bytes.
It only worked because size was aligned to 4096 outside of the function.
Signed-off-by: Christian König <[email protected]>
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Cleanup the duplicating flags and consolidate into a sigle variable.
Note: this patch adds VISIBILITY_CFLAGS to the following targets
* freedreno/drm
* i915/{drm,sw}
* nouveau/drm
* sw/fbdev
* sw/null
* sw/wayland
* sw/wrapper
* sw/xlib
Signed-off-by: Emil Velikov <[email protected]>
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Update additional register fields.
Reviewed-by: Michel Dänzer <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The type-2 NOPs are said to be unstable. It doesn't make a difference here.
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Otherwise OpenGL/VDPAU interop won't work as expected.
Signed-off-by: Christian König <[email protected]>
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Using atomic function for ncs is superfluous since it is
protected by a mutex anyway. Also lock the mutex only once
while retrieving the next CS for submission.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Calling radeon_drm_cs_flush from multiple threads might cause deadlocks,
fix this by immediately signaling the semaphore after waiting for it.
This is a candidate for the stable branch(es).
Partially fixes: https://bugs.freedesktop.org/show_bug.cgi?id=70123
v2: some fixes on commit message
Signed-off-by: Christian König <[email protected]>
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Reviewed-by: Tom Stellard <[email protected]>
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Only create one screen for each winsys instance.
This helps with buffer sharing and interop handling.
v2: rebased and some minor cleanup
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Similar to GFX and DMA.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Share the winsys between different fd's if they point to the same device.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Waiting for an empty queue is nonsense and can lead to deadlocks if we have
multiple waiters or another thread that continuously sends down new commands.
Just post the cs to the queue and immediately wait for it to finish.
This is a candidate for the stable branch.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Kill the thread only after we checked that it's not used any more, not before.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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This aligns the gfx, compute, and dma IBs to 8 DW boundries.
This aligns the the IB to the fetch size of the CP for optimal
performance. Additionally, r6xx hardware requires at least 4
DW alignment to avoid a hw bug. This also aligns the DMA
IBs to 8 DW which is required for the DMA engine. This
alignment is already handled in the gallium driver, but that
patch can be removed now that it's done in the winsys.
Reviewed-by: Marek Olšák <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
CC: "9.2" <[email protected]>
CC: "9.1" <[email protected]>
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And remove libdrm/ from a winsys include statement.
Signed-off-by: Jonathan Gray <[email protected]>
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It moves all sampler view descriptors to a buffer.
It supports partial resource updates and it can also unbind resources
(required for FMASK texturing).
The buffer contains all sampler view descriptors for one shader stage,
represented as an array. On top of that, there are N arrays in the buffer,
which are used to emulate context registers as implemented by the previous
ASICs (each array is a context).
This uses the RCU synchronization approach to avoid read-after-write hazards
as discussed in the thread:
"radeonsi: add FMASK texture binding slots and resource setup"
CP DMA is used to clear the descriptors at context initialization and to copy
the descriptors from one context to the next.
v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later)
- turn the bool CP DMA parameters into self-explanatory flags
- add a nice simple API for packet emission to radeon_winsys.h
- use 256 contexts, 128 causes texture corruption in openarena
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Cayman and trinity systems still seem to suffer from
stability problems with GPUVM. This also fixes compute
on these asics. It can still be enabled for testing
by setting env var RADEON_VA=true.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=65958
Signed-off-by: Alex Deucher <[email protected]>
CC: "9.2" <[email protected]>
CC: "9.1" <[email protected]>
Reviewed-by: Christian König <[email protected]>
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The original idea was that cs=NULL should be allowed here, but we never used
NULL until 862f69fbe1e54e0e9a3c439450a14f. This fixes a segfault in CoreBreach.
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Add the infrastructure to differentiate them.
Just treat them like SI for now.
Signed-off-by: Alex Deucher <[email protected]>
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Covers the entire family.
Signed-off-by: Alex Deucher <[email protected]>
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Set env var RADEON_VA=0 to disable VM on Cayman/Trinity.
Useful for debugging.
Note: this is a candidate for the 9.1 branch.
Signed-off-by: Alex Deucher <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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