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* winsys/radeon: use type-3 NOPs for CS padding on CIKMarek Olšák2013-11-041-2/+7
| | | | The type-2 NOPs are said to be unstable. It doesn't make a difference here.
* winsys/radeon: make radeon_drm_winsys_create publicChristian König2013-10-261-1/+1
| | | | | | Otherwise OpenGL/VDPAU interop won't work as expected. Signed-off-by: Christian König <[email protected]>
* winsys/radeon: add the implementation of fences from r300gMarek Olšák2013-10-252-0/+79
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* winsys/radeon: cleanup CS offloadingChristian König2013-10-211-21/+10
| | | | | | | | | Using atomic function for ncs is superfluous since it is protected by a mutex anyway. Also lock the mutex only once while retrieving the next CS for submission. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: fix handling in radeon_drm_cs_flush v2Christian König2013-10-102-5/+4
| | | | | | | | | | | | | Calling radeon_drm_cs_flush from multiple threads might cause deadlocks, fix this by immediately signaling the semaphore after waiting for it. This is a candidate for the stable branch(es). Partially fixes: https://bugs.freedesktop.org/show_bug.cgi?id=70123 v2: some fixes on commit message Signed-off-by: Christian König <[email protected]>
* gallium/radeon: don't export any private symbolsMarek Olšák2013-10-081-1/+2
| | | | Reviewed-by: Tom Stellard <[email protected]>
* radeon/winsys: keep screen pointer in winsys v2Christian König2013-09-252-4/+15
| | | | | | | | | | Only create one screen for each winsys instance. This helps with buffer sharing and interop handling. v2: rebased and some minor cleanup Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/uvd: move alignment to winsysChristian König2013-09-251-0/+6
| | | | | | | Similar to GFX and DMA. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: share winsys between different fd'sChristian König2013-09-221-2/+17
| | | | | | | Share the winsys between different fd's if they point to the same device. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: remove cs_queue_emptyChristian König2013-09-223-19/+3
| | | | | | | | | | | | Waiting for an empty queue is nonsense and can lead to deadlocks if we have multiple waiters or another thread that continuously sends down new commands. Just post the cs to the queue and immediately wait for it to finish. This is a candidate for the stable branch. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: fix killing the CS threadChristian König2013-09-221-4/+4
| | | | | | | Kill the thread only after we checked that it's not used any more, not before. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: pad IBs to a multiple of 8 DWsAlex Deucher2013-09-061-0/+30
| | | | | | | | | | | | | | | This aligns the gfx, compute, and dma IBs to 8 DW boundries. This aligns the the IB to the fetch size of the CP for optimal performance. Additionally, r6xx hardware requires at least 4 DW alignment to avoid a hw bug. This also aligns the DMA IBs to 8 DW which is required for the DMA engine. This alignment is already handled in the gallium driver, but that patch can be removed now that it's done in the winsys. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> CC: "9.2" <[email protected]> CC: "9.1" <[email protected]>
* radeonsi: Make sure libdrm_radeon headers are picked up from the right placeJonathan Gray2013-08-291-1/+1
| | | | | | And remove libdrm/ from a winsys include statement. Signed-off-by: Jonathan Gray <[email protected]>
* radeonsi: add flexible shader descriptor management and use it for sampler viewsMarek Olšák2013-08-171-0/+12
| | | | | | | | | | | | | | | | | | | | | | | It moves all sampler view descriptors to a buffer. It supports partial resource updates and it can also unbind resources (required for FMASK texturing). The buffer contains all sampler view descriptors for one shader stage, represented as an array. On top of that, there are N arrays in the buffer, which are used to emulate context registers as implemented by the previous ASICs (each array is a context). This uses the RCU synchronization approach to avoid read-after-write hazards as discussed in the thread: "radeonsi: add FMASK texture binding slots and resource setup" CP DMA is used to clear the descriptors at context initialization and to copy the descriptors from one context to the next. v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later) - turn the bool CP DMA parameters into self-explanatory flags - add a nice simple API for packet emission to radeon_winsys.h - use 256 contexts, 128 causes texture corruption in openarena
* r600g: disable GPUVM by defaultAlex Deucher2013-08-091-1/+1
| | | | | | | | | | | | | | | Cayman and trinity systems still seem to suffer from stability problems with GPUVM. This also fixes compute on these asics. It can still be enabled for testing by setting env var RADEON_VA=true. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=65958 Signed-off-by: Alex Deucher <[email protected]> CC: "9.2" <[email protected]> CC: "9.1" <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: allow a NULL cs pointer in radeon_bo_map to fix a segfaultMarek Olšák2013-07-131-9/+11
| | | | | The original idea was that cs=NULL should be allowed here, but we never used NULL until 862f69fbe1e54e0e9a3c439450a14f. This fixes a segfault in CoreBreach.
* radeonsi: initial support for CIK chipsAlex Deucher2013-06-282-0/+9
| | | | | | | Add the infrastructure to differentiate them. Just treat them like SI for now. Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: rename SI chip class from TAHITI to SIAlex Deucher2013-06-282-2/+2
| | | | | | Covers the entire family. Signed-off-by: Alex Deucher <[email protected]>
* winsys/radeon: add env var to disable VM on Cayman/TrinityAlex Deucher2013-06-101-0/+2
| | | | | | | | | | | Set env var RADEON_VA=0 to disable VM on Cayman/Trinity. Useful for debugging. Note: this is a candidate for the 9.1 branch. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: correct RADEON_GEM_WAIT_IDLE useJonathan Gray2013-06-062-2/+2
| | | | | | | | | | | | RADEON_GEM_WAIT_IDLE is declared DRM_IOW but mesa uses it with drmCommandWriteRead instead of drmCommandWrite which leads to the ioctl being unmatched and returning an error on at least OpenBSD. Problem originally noticed in libdrm by Mark Kettenis. Dave Airlie pointed out that mesa has the same issue. Signed-off-by: Jonathan Gray <[email protected]>
* radeonsi: add support for hainan chipsAlex Deucher2013-05-142-0/+2
| | | | | | | Note: this is a candidate for the 9.1 branch Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* scons: remove radeon buildAndreas Boll2013-05-031-14/+0
| | | | | | | | One build system for linux/unix only drivers should be enough. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48694 Acked-by: Jose Fonseca <[email protected]>
* winsys/radeon: consolidate tracing into winsys v2Jerome Glisse2013-04-255-29/+46
| | | | | | | | | | | | This move the tracing timeout and printing into winsys and add an debug environement variable for it (R600_DEBUG=trace_cs). Lot of file touched because of winsys API changes. v2: Do not write lockup file if ib uniq id does not match last one Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: use query_value for timestamp, remove query_timestampMarek Olšák2013-04-162-25/+12
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* r600g: add a query returning the amount of time spent during bo_map sync.Marek Olšák2013-04-164-2/+11
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* radeon/winsys: add uvd ring support to winsys v3Christian König2013-04-113-0/+31
| | | | | | | | | | | | | Separated from UVD patch for clarity. v2: sync with next tree for 3.10 v3: as pointed out by Andreas Bool check for drm minor >= 32 http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Andreas Boll <[email protected]>
* winsys/radeon: add command stream replay dump for faulty lockup v3Jerome Glisse2013-04-057-37/+443
| | | | | | | | | | | | | | | | | | Build time option, set RADEON_CS_DUMP_ON_LOCKUP to 1 in radeon_drm_cs.h to enable it. When enabled after each cs submission the code will try to detect lockup by waiting on one of the buffer of the cs to become idle, after a timeout it will consider that the cs triggered a lockup and will write a radeon_lockup.c file in current directory that have all information for replaying the cs. To build this file : gcc -O0 -g radeon_lockup.c -ldrm -o radeon_lockup -I/usr/include/libdrm v2: Add radeon_ctx.h file to mesa git tree v3: Slightly improve dumped file for easier editing, only dump first faulty cs Signed-off-by: Jerome Glisse <[email protected]>
* r600g: add a driver query returning the amount of requested VRAM and GTT memoryMarek Olšák2013-03-265-0/+40
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* winsys/radeon: Only add bo to hash table when creating flinkMartin Andersson2013-03-011-4/+4
| | | | | | | | | | | | | The problem is that we mix bo handles and flinked names in the hash table. Because kms type handles are not flinked they should not be added to the hash table. If we do that we will sooner or later get a situation where we will overwrite a correct entry because the bo handle was the same as a flinked name. Note: this is a candidate for the stable branches. Reviewed-by: Jerome Glisse <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* winsys/radeon: fix bo with virtual address referencing mismatchMartin Andersson2013-02-111-0/+4
| | | | | | | | | | | | | | If the same context try to flink and open the object, use the same bo struct instead of opening a new gem handle for the object. This way we avoid avoid having 2 different handle pointing to the same kernel object which can latter lead to trouble with virtual address. Fix: https://bugs.freedesktop.org/show_bug.cgi?id=60200 Signed-off-by: Martin Andersson <[email protected]> Reviewed-by: Jerome Glisse <[email protected]>
* winsys/radeon: improve debuging printingJerome Glisse2013-02-081-1/+2
| | | | | | | Make sure one can identify virtual address failure from allocation failure. Signed-off-by: Jerome Glisse <[email protected]>
* radeonsi: add support for Oland chipsAlex Deucher2013-02-042-0/+2
| | | | | | Signed-off-by: Alex Deucher <[email protected]> Note: this is a candidate for the 9.1 branch
* r600g: add cs memory usage accounting and limit it v3Jerome Glisse2013-01-312-0/+21
| | | | | | | | | | | | | | | | | | | We are now seing cs that can go over the vram+gtt size to avoid failing flush early cs that goes over 70% (gtt+vram) usage. 70% is use to allow some fragmentation. The idea is to compute a gross estimate of memory requirement of each draw call. After each draw call, memory will be precisely accounted. So the uncertainty is only on the current draw call. In practice this gave very good estimate (+/- 10% of the target memory limit). v2: Remove left over from testing version, remove useless NULL checking. Improve commit message. v3: Add comment to code on memory accounting precision Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: add dma ring support to winsys v3Jerome Glisse2013-01-286-79/+215
| | | | | | | | | | | | | | | | | | | | Add ring support, you can create a cs for each ring. DMA ring is bit special regarding relocation as you must emit as much relocation as there is use of the buffer. v2: - Improved comment on relocation changes - Use a single thread to queue cs submittion this simplify driver code while not impacting performances. Rational for this is that you have to wait for all previous submission to have completed so there was never a case while we could have 2 different thread submitting a command stream at the same time. This code just consolidate submission into one single thread per winsys. v3: - Do not use semaphore for empty queue signaling, instead use cond var. This is because it's tricky to maintain an even number of call to semaphore wait and semaphore signal (the number of cs in the stack would for instance make that number vary). Signed-off-by: Jerome Glisse <[email protected]>
* r300g: random hyperz cleanupsMarek Olšák2013-01-141-15/+10
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* Remove hacks for static MakefilesMatt Turner2013-01-131-4/+0
| | | | | | | | | | | v2: Andreas Boll <[email protected]> - don't remove compatibility with scripts for the old build system v3: Andreas Boll <[email protected]> - remove more obsolete hacks v4: Andreas Boll <[email protected]> - add a previously removed TOP variable to fix vgapi build
* Clean up .gitignore filesMatt Turner2013-01-101-1/+0
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* radeon/winsys: Convert to automakeTom Stellard2013-01-103-15/+16
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* winsys/radeon: bump the size of relocation hashlistMarek Olšák2013-01-081-2/+2
| | | | This should reduce the number of hash collisions in ETQW.
* radeon/winsys: move radeon family/class identification to winsysJerome Glisse2013-01-073-38/+176
| | | | | | | | Upcoming async dma support rely on winsys knowing about GPU families. Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeon/winsys: indentation cleanupJerome Glisse2013-01-072-3/+2
| | | | | | Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: send the END_OF_FRAME flag to the DRMMarek Olšák2013-01-042-2/+9
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* winsys/radeon: the env var RADEON_NOOP can be used to skip CS ioctlsMarek Olšák2012-12-211-1/+4
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* winsys/radeon: don't use BIND flags, add a flag for the cache bufmgr insteadMarek Olšák2012-12-122-5/+4
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* r300g: enable Hyper-Z by default on r500Marek Olšák2012-12-021-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | I fixed the only known bugs on r500 with 0222b2bd4107b9e5cabfbc06c1a6ca3eae. Now there are no piglit regressions with Hyper-Z and all apps I tested seem to work. To summarize how it works: - Only one process can use it at a time. This is a hardware limitation. - The first process to clear a zbuffer gets the exclusive access to use Hyper-Z. - Compositors don't use any zbuffer, so they won't steal it, but some web browsers do, so make sure there's no web browser running if you want your game to use Hyper-Z. - There's no need to restart an app which couldn't get the access to Hyper-Z. Just quit the app which took it, the driver can turn it on for the other app in the middle of rendering. - If an app gets the access to Hyper-Z, it prints "radeon: Acquired Hyper-Z" to stdout. r300-r400: Hyper-Z will be enabled by default on r300-r400 once sufficient testing is done with piglit and Lightsmark at least. Be sure to set the env var RADEON_HYPERZ and run piglit with parameters: -c 0
* winsys/radeon: fix relocs cachingVadim Girlin2012-09-192-8/+6
| | | | | | | | | | | Don't cache pointers to elements of reallocatable array. In some circumstances it caused false cache hits resulting in incorrect command stream and gpu lockup. Note: This is a candidate for the stable branches. Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* Don't cast the return value of malloc/reallocMatt Turner2012-09-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has been generated by the following Coccinelle semantic patch: // Don't cast the return value of malloc/realloc. // // Casting the return value of malloc/realloc only stands to hide // errors. @@ type T; expression E1, E2; @@ - (T) ( _mesa_align_calloc(E1, E2) | _mesa_align_malloc(E1, E2) | calloc(E1, E2) | malloc(E1) | realloc(E1, E2) )
* winsys/radeon: create only one winsys for each fdChristian König2012-09-042-2/+41
| | | | | | | Fixing problems with GLAMOR. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: Don't assign virtual address space for BO that already has one.Michel Dänzer2012-08-161-1/+1
| | | | | | | | We'd end up re-using the old one and throwing away the new one anyway, but only after a roundtrip to the kernel. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: Create hole for waste when allocating from va_offset.Michel Dänzer2012-08-161-0/+6
| | | | | | | Otherwise, the wasted area could never be used for an allocation again. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
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