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path: root/src/gallium/winsys/amdgpu
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* winsys/amdgpu: fix Polaris12 (RX 550) breakageMarek Olšák2017-05-051-0/+1
* winsys/amdgpu: init buffer_indices_hashlist with memset()Samuel Pitoiset2017-04-171-8/+2
* winsys/amdgpu: simplify amdgpu_cs_add_buffer() a bitSamuel Pitoiset2017-04-171-4/+3
* gallium/radeon: add HUD queries for GPU temperature and clocksSamuel Pitoiset2017-04-101-1/+6
* winsys/amdgpu: sparse buffer debugging helpersNicolai Hähnle2017-04-051-0/+61
* winsys/amdgpu: take fences when freeing a backing bufferNicolai Hähnle2017-04-051-3/+11
* winsys/amdgpu: add sparse buffers to CSNicolai Hähnle2017-04-052-16/+140
* winsys/amdgpu: sparse buffer creation / destruction / commitmentNicolai Hähnle2017-04-051-1/+400
* winsys/amdgpu: add sparse buffer data structuresNicolai Hähnle2017-04-052-1/+46
* winsys/amdgpu: extend amdgpu_add_fence to allow adding multiple fencesNicolai Hähnle2017-04-052-11/+27
* winsys/amdgpu: build handles and flags list late on submit threadNicolai Hähnle2017-04-052-17/+28
* winsys/amdgpu: share common code in amdgpu_add_fence_dependenciesNicolai Hähnle2017-04-051-21/+17
* winsys/amdgpu: extract amdgpu_do_add_real_bufferNicolai Hähnle2017-04-051-8/+18
* radeonsi/gfx9: fix and enable single-sample CMASK fast clearMarek Olšák2017-03-311-0/+7
* radeonsi/gfx9: fix and enable MSAA compressionMarek Olšák2017-03-311-1/+1
* radeonsi/gfx9: fix linear mipmap CPU accessMarek Olšák2017-03-311-1/+1
* winsys/amdgpu: remove AMDGPU_INFO_NUM_EVICTIONSSamuel Pitoiset2017-03-301-4/+0
* winsys/surface: add height pitch for gfx9Leo Liu2017-03-301-0/+1
* winsys/amdgpu: set/get BO tiling flags for GFX9Marek Olšák2017-03-301-2/+4
* radeonsi/gfx9: add radeon_surf.gfx9.surf_offsetMarek Olšák2017-03-301-0/+1
* radeonsi/gfx9: add a workaround for 1D depth texturesMarek Olšák2017-03-301-7/+5
* gallium/radeon: move pre-GFX9 radeon_bo_metadata.* to u.legacy.*Marek Olšák2017-03-301-34/+40
* winsys/amdgpu: set num_tile_pipes, pipe_interleave_bytes for GFX9Marek Olšák2017-03-301-2/+11
* winsys/amdgpu: wire up new addrlib for GFX9Marek Olšák2017-03-301-1/+399
* winsys/amdgpu: update amdgpu_addr_create for GFX9Marek Olšák2017-03-301-17/+29
* winsys/amdgpu: rename GFX6 surface functionsMarek Olšák2017-03-301-25/+29
* gallium/radeon: move pre-GFX9 radeon_surf.* members to radeon_surf.u.legacy.*Marek Olšák2017-03-301-28/+29
* radeonsi/gfx9: set the LLVM processor, require LLVM 5.0Marek Olšák2017-03-301-0/+7
* radeonsi/gfx9: add GFX9 and VEGA10 enumsMarek Olšák2017-03-301-1/+6
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-301-7/+5
* winsys/amdgpu: use drmGetDevice2 APIEmil Velikov2017-03-151-2/+2
* gallium/util: replace pipe_mutex_unlock() with mtx_unlock()Timothy Arceri2017-03-073-15/+15
* gallium/util: replace pipe_mutex_lock() with mtx_lock()Timothy Arceri2017-03-073-9/+9
* gallium/util: replace pipe_mutex_destroy() with mtx_destroy()Timothy Arceri2017-03-071-2/+2
* gallium/util: replace pipe_mutex_init() with mtx_init()Timothy Arceri2017-03-071-2/+2
* gallium/util: remove pipe_static_mutex()Timothy Arceri2017-03-071-1/+1
* gallium/util: replace pipe_mutex with mtx_tTimothy Arceri2017-03-071-2/+2
* radeonsi: drop support for LLVM 3.6 & 3.7Marek Olšák2017-03-061-8/+0
* gallium/u_queue: isolate util_queue_fence implementationMarek Olšák2017-02-221-1/+1
* winsys/amdgpu: reduce max_alloc_size based on GTT limitsNicolai Hähnle2017-02-211-2/+4
* radeonsi: use a clever alignment for constant buffer uploadsMarek Olšák2017-02-181-0/+1
* gallium/radeon: add a HUD query for monitoring the CS thread activityMarek Olšák2017-02-151-0/+2
* winsys/amdgpu: avoid potential segfault in amdgpu_bo_map()Samuel Pitoiset2017-02-031-7/+10
* winsys/amdgpu: add a fast exit path into amdgpu_cs_add_bufferMarek Olšák2017-01-302-0/+21
* winsys/amdgpu: do not iterate twice when adding fence dependenciesSamuel Pitoiset2017-01-301-31/+32
* winsys/amdgpu: add one likely() call in amdgpu_cs_flush()Samuel Pitoiset2017-01-301-2/+2
* winsys/amdgpu: fix ADDR_REGISTER_VALUE::backendDisablesMarek Olšák2017-01-301-1/+1
* gallium/radeon: add VRAM-vis-usage HUD querySamuel Pitoiset2017-01-261-0/+4
* gallium/radeon: query the CPU accessible size of VRAMSamuel Pitoiset2017-01-261-1/+10
* gallium/radeon: add a new HUD query for the number of mapped buffersSamuel Pitoiset2017-01-253-0/+6
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