summaryrefslogtreecommitdiffstats
path: root/src/gallium/tests/graw/vertex-shader
Commit message (Collapse)AuthorAgeFilesLines
* gallium/tests: remove execute bit from TGSI shader - vert-uadd.shEmil Velikov2017-03-101-0/+0
| | | | | | | | | Just like the the dozens of other shaders, the file is parsed by separate tool and not executed. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* gallium: Add support for 32x32 muls with 64 bit resultsZack Rusin2013-10-092-0/+24
| | | | | | | | | | | | | | The code introduces two new 32bit integer multiplication opcodes which can be used to produce correct 64 bit results. GLSL, OpenCL and D3D10+ require them. We use two seperate opcodes, because they match the behavior of GLSL and OpenCL, are a lot easier to add than a single opcode with multiple destinations and because there's not much (any) difference wrt code-generation. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* gallivm: Fix assignment of unsigned values to OUT register.José Fonseca2013-04-221-0/+9
| | | | | | | | | | | | | | TEMP is not the only register file that accept unsigned. OUT too. Actually, what determines the appropriate type of the destination value is not the opcode, but rather the register. Also cleanup/simplify code. Add a few more asserts, but also make code more robust by handling graceful if assert fails. This fixes segfault / assertion in the included vert-uadd.sh graw shader. Reviewed-by: Roland Scheidegger <[email protected]>
* tgsi: Add support to parse IMM[x] too.José Fonseca2012-10-171-2/+2
| | | | Thanks to Brian for pointing this out.
* graw: Replace dead symlinks to delete python statetracker shaders with their ↵José Fonseca2011-04-2331-1/+454
| | | | contents.
* graw: add symlinks to shader test directoriesKeith Whitwell2010-06-071-0/+1