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* gallium: add PIPE_CAP_TGSI_ATOMFADD to indicate supportIlia Mirkin2018-12-261-0/+1
| | | | | | | | ATOMFADD is a little special -- make drivers have to specify it explicitly. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi: add ATOMFADD operationIlia Mirkin2018-12-261-1/+1
| | | | | | | | This is supported by at least NVIDIA hardware, and exposeable via GL extensions. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: fix typoRob Clark2018-12-071-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNTKristian H. Kristensen2018-12-062-0/+8
| | | | | | | | | | | This new pipe cap and the new nr_samples field in pipe_surface lets a state tracker bind a render target with a different sample count than the resource. This allows for implementing EXT_multisampled_render_to_texture and EXT_multisampled_render_to_texture2. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Kristian H. Kristensen <[email protected]>
* winsys/amdgpu: explicitly declare whether buffer_map is permanent or notNicolai Hähnle2018-11-281-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver-private transfer flag RADEON_TRANSFER_TEMPORARY that specifies whether the caller will use buffer_unmap or not. The default behavior is set to permanent maps, because that's what drivers do for Gallium buffer maps. This should eliminate the need for hacks in libdrm. Assertions are added to catch when the buffer_unmap calls don't match the (temporary) buffer_map calls. I did my best to update r600 for consistency (r300 needs no changes because it never calls buffer_unmap), even though the radeon winsys ignores the new flag. As an added bonus, this should actually improve the performance of the normal fast path, because we no longer call into libdrm at all after the first map, and there's one less atomic in the winsys itself (there are now no atomics left in the UNSYNCHRONIZED fast path). Cc: Leo Liu <[email protected]> v2: - remove comment about visible VRAM (Marek) - don't rely on amdgpu_bo_cpu_map doing an atomic write Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CONTEXT_LOSE_CONTEXT_ON_RESETMarek Olšák2018-11-091-0/+3
| | | | Tested-by: Dieter Nützel <[email protected]>
* Gallium: Add format PIPE_FORMAT_R8_SRGBGert Wollny2018-11-021-0/+2
| | | | | | | | | | | | | | | | | | | | | | | This format is needed to support EXT_texture_sRGB_R8. THe patch adds a new format enum, the format entries in Gallium and and svga, the mapping between sRGB and linear formats, and tests. v2: - add mapping to linear format for PIPE_FORMATR_R8_SRGB v3: - Add texture format to svga format table since otherwise building mesa will fail when this driver is enabled. It was not tested whether the extension actually works. v4: - svga: remove the SVGA specific format definitions and table entries and only add correct the location of PIPE_FORMAT_R8_SRGB in the format_conversion_table (Ilia Mirkin) - Split patch (1/2) to separate Gallium part and mesa/st part. (Roland Scheidegger) - Trim the commit message to only contain the relevant parts from the split. v5: - svga: correct location of PIPE_FORMAT_SRGB_R8 (Ilia Mirkin) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: rework PIPE_HANDLE_USAGE_* flagsMarek Olšák2018-10-301-5/+3
| | | | Only radeonsi uses them, so adjust them to match its needs.
* st/mesa: Record shader access qualifiers for imagesJason Ekstrand2018-10-231-1/+2
| | | | | | | | | | | | They're not required to be the same as the access flag on the image unit. For hardware that does shader image lowering based on the qualifier (Intel), it may be required for state setup. v2: (by Kenneth Graunke, incorporating feedback from Marek Olšák) - Reduce both access and shader_access to uint16_t to avoid making the pipe_image_view structure larger. Reviewed-by: Marek Olšák <[email protected]>
* gallium: Correctly handle no config context creationElie Tournier2018-09-101-0/+2
| | | | | | | | | | | | This patch fixes the following Piglit test: spec@egl_mesa_configless_context@basic It also fixes few test in a virgl guest. v2: Evaluate the value of no_config (Ilia) Suggested-by: Emil Velikov <[email protected]> Signed-off-by: Elie Tournier <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.Mathias Fröhlich2018-09-101-0/+1
| | | | | | | | | | | Introduce a new capability for the maximum value of pipe_vertex_element::src_offset. Initially just every driver backend returns the value previously set from _mesa_init_constants. So this shall end up in no functional change. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGETMarek Olšák2018-09-071-0/+1
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* gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)Marek Olšák2018-09-072-0/+21
| | | | | | | | | State trackers will not use the new param directly, but will instead use a helper in MakeCurrent that does the right thing. v2: rework the interface Reviewed-by: Brian Paul <[email protected]>
* gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsiMarek Olšák2018-09-061-0/+1
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* gallium: split depth_clip into depth_clip_near & depth_clip_farMarek Olšák2018-09-061-1/+5
| | | | for AMD_depth_clamp_separate.
* gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITSMarek Olšák2018-09-061-0/+1
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER{S,_BUFFERS}Erik Faye-Lund2018-09-051-0/+2
| | | | | | | | | | | | | | This moves the evergreen-specific max-sizes out as a driver-cap, so other drivers with less strict requirements also can use hw-atomics. Remove ssbo_atomic as it's no longer needed. We should now be able to use hw-atomics for some stages and not for other, if needed. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* gallium: add PIPE_CAP_MAX_COMBINED_SHADER_BUFFERSErik Faye-Lund2018-09-051-0/+1
| | | | | | | | | | | This gets rid of a r600 specific hack in the state-tracker, and prepares for other drivers to be able to use hw-atomics. While we're at it, clean up some indentation in the various drivers. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Gurchetan Singh <[email protected]>
* st/mesa, gallium: add a workaround for No Mans SkyTimothy Arceri2018-08-301-0/+1
| | | | | | | | The spec seems clear this is not allowed but the Nvidia binary forces apps to add layout qualifiers so this works around the issue for No Mans Sky until the CTS can be sorted out. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add TGSI_MEMORY_STREAM_CACHE_POLICYMarek Olšák2018-08-291-2/+6
| | | | For internal radeonsi shaders.
* gallium: Split out PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE.Kenneth Graunke2018-08-241-0/+1
| | | | | | | | | | | | | Some hardware can do PIPE_TEX_WRAP_MIRROR_REPEAT but not PIPE_TEX_WRAP_MIRROR_CLAMP and PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER. Drivers for such hardware would like to advertise support for ARB_texture_mirror_clamp_to_edge but not EXT_texture_mirror_clamp. This commit adds a new PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE bit, changes the extension enable to be based on that, and enables it in all upstream drivers which supported PIPE_CAP_TEXTURE_MIRROR_CLAMP (so they continue supporting this mode).
* gallium: add PIPE_CAP_MAX_SHADER_BUFFER_SIZEMarek Olšák2018-08-231-0/+1
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium: add PIPE_CAP_MAX_GS_INVOCATIONSMarek Olšák2018-08-231-0/+1
| | | | Tested-by: Dieter Nützel <[email protected]>
* mesa: remove unused dri config option disable_shader_bit_encodingTimothy Arceri2018-08-211-1/+0
| | | | | | | This was added as a workaround for Heaven 3.0 but was later removed by 5ead448719f3 to allow Heaven 4.0 to work correctly. Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: add new SAMP2HND and IMG2HND opcodesRhys Perry2018-08-011-0/+2
| | | | | | | | This commit does not add support for the opcodes in gallivm or tgsi_to_nir.c Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium: add storage_sample_count parameter into is_format_supportedMarek Olšák2018-07-311-0/+1
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium: add pipe_resource::nr_storage_samples, and set it same as nr_samplesMarek Olšák2018-07-311-3/+15
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium: add PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTSMarek Olšák2018-07-311-0/+1
| | | | Tested-by: Dieter Nützel <[email protected]>
* gallium: add scalar isa shader capChristian Gmeiner2018-06-201-0/+1
| | | | | | | | | | | | | | | | v1 -> v2: - nv30 is _NOT_ scalar as suggested by Ilia Mirkin. - Change from a screen cap to a shader cap as suggested by Eric Anholt. - radeonsi is scalar as suggested by Marek Olšák. - Change missing ones to be scalar. v2 -> v3: - r600 prefers vec4 as suggested by Marek Olšák. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/util: add allow_glsl_relaxed_es driconfig overrideTimothy Arceri2018-06-191-0/+1
| | | | | | | | | | | | | | | This relaxes a number of ES shader restrictions allowing shaders to follow more desktop GLSL like rules. This initial implementation relaxes the following: - allows linking ES shaders with desktop shaders - allows mismatching precision qualifiers - always enables standard derivative builtins These relaxations allow Google Earth VR shaders to compile. Reviewed-by: Dave Airlie <[email protected]>
* mesa/util: add allow_glsl_builtin_const_expression driconf overrideTimothy Arceri2018-06-191-0/+1
| | | | | | | Google Earth VR shaders uses builtins in constant expressions with GLSL 1.10. That feature wasn't allowed until GLSL 1.20. Reviewed-by: Dave Airlie <[email protected]>
* gallium: add support for programmable sample locationsRhys Perry2018-06-144-2/+52
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]> (v2)
* gallium: add PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITYMarek Olšák2018-05-291-0/+1
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* drisw: learn to query shmid handle typeMarc-André Lureau2018-05-303-2/+3
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Adam Jackson <[email protected]>
* drisw: use putImageShm if availableMarc-André Lureau2018-05-301-0/+3
| | | | | | | | If the DRIswrastLoaderExtension implements putImageShm, bind it to drisw_loader_funcs. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Adam Jackson <[email protected]>
* gallium/winsys: rename DRM_API_HANDLE_* to WINSYS_HANDLE_*Dave Airlie2018-05-302-6/+6
| | | | | | | | | | | | This just renames this as we want to add an shm handle which isn't really drm related. Originally by: Marc-André Lureau <[email protected]> (airlied: I used this sed script instead) This was generated with: git grep -l 'DRM_API_' | xargs sed -i 's/DRM_API_/WINSYS_/g' Reviewed-by: Marek Olšák <[email protected]>
* gallium: move winsys handle to it's own file.Marc-André Lureau2018-05-302-47/+59
| | | | | | | This will be used in the drisw interface later, which isn't drm specific. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add initial support for conservative rasterizationRhys Perry2018-04-302-0/+28
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vl: add VP9 profile2 supportLeo Liu2018-04-121-1/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* vl: add VP9 picture descriptionLeo Liu2018-04-121-0/+94
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* vl: add VP9 profile0 and formatLeo Liu2018-04-121-2/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Christian König <[email protected]>
* gallium: Correct minor typo in header commentsAlyssa Rosenzweig2018-03-261-1/+1
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* tgsi: convert opcode macros to enumsBrian Paul2018-03-231-273/+275
| | | | | | Enums are nicer in gdb. Reviewed-by: Eric Anholt <[email protected]>
* gallium: add packed uniform CAPTimothy Arceri2018-03-201-0/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium: increase PIPE_MAX_SHADER_SAMPLER_VIEWS to 128Roland Scheidegger2018-03-061-1/+1
| | | | | | | Some state trackers require 128. (There are no plans to increase PIPE_MAX_SAMPLERS too, since with gl state tracker it's unlikely more than 32 will be needed, if you need more use bindless.)
* gallium: remove llvm from ir structTimothy Arceri2018-03-011-1/+0
| | | | | | | This was added in 425dc4c4b366 but never used. Also since 100796c15c3a native has superseded llvm. Acked-by: Dave Airlie <[email protected]>
* gallium: allow drivers to impose BO flags restrictions on constant buffer 0Marek Olšák2018-02-171-0/+1
| | | | Required by radeonsi for optimal behavior.
* gallium: drop all the guard band float caps.Dave Airlie2018-02-141-4/+0
| | | | | | | | | | Nobody queries these and nobody sets them to anything useful, the docs say TODO. Drop them until a use appears. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* vl: add parameters for HEVC encodeBoyuan Zhang2018-02-051-0/+99
| | | | | | | Add HEVC encode interface Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Christian König <[email protected]>
* gallium: Add a new A4B4G4R4 pipe format for Broadcom.Eric Anholt2018-02-021-0/+1
| | | | | | | | The VC5 HW puts A in the low bits and R in the high bits. We can't just swizzle in the shaders because the blending HW can't pick what channel A is in, so make a new format to match it. Reviewed-by: Marek Olšák <[email protected]>
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