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* r300g: take advantage of KEEP_TILING_FLAGS flush flagMarek Olšák2011-12-132-2/+10
| | | | This fixes at least two multi-context-related races.
* nouveau: get rid of winsys objectMarcin Slusarz2011-12-1314-27/+15
| | | | Its only purpose was to destroy itself.
* i915g: Roll back to the previous shader limits.Stéphane Marchesin2011-12-133-6/+2
| | | | Those shader limits seem to be responsible for a piglit hang.
* i915g: Update TODO.Stéphane Marchesin2011-12-131-0/+2
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* mesa: add const flags to skip MaxVarying and MaxUniform linker checks (v2)Marek Olšák2011-12-131-0/+2
| | | | | | | | | This is only temporary until a better solution is available. v2: print warnings and add gallium CAPs Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* r300g: integer and fixed-point 16.16 textures are not supportedMarek Olšák2011-12-121-0/+11
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* i915g: fix debug dump on 64 bit systemsMichael Karcher2011-12-111-1/+1
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* i915g: Fix wrong indices for LINE_LOOP caseFatih Aşıcı2011-12-111-2/+2
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* llvmpipe: Trim the fragment shader cached based on LLVM IR instruction count.José Fonseca2011-12-084-11/+33
| | | | | | | | | | | | Number of fragment shader variants is not very representative of the memory used by LLVM, neither is number of shader instructions, as often texture sampling constitutes most of the generated code. This change adds an additional trim criteria: least recently used fragment shader variants will be freed until the total number of LLVM IR instruction falls below a specified threshold. Reviewed-by: Brian Paul <[email protected]>
* llvmpipe,draw,gallivm: Ensure we don't walk beyond the end of the shader ↵José Fonseca2011-12-082-3/+11
| | | | | | | | | | | variant list. u_simple_list.h uses a sentinel element, and not a NULL element. So ensure list is not empty when reducing the list of shader variants. Something I noticed while trying to free variants more aggressively. Reviewed-by: Brian Paul <[email protected]>
* nouveau/nvfx: Add more unsupported PIPE_CAP valuesPatrice Mandin2011-12-061-1/+5
| | | | Signed-off-by: Patrice Mandin <[email protected]>
* r600g: check shaders presence in r600_draw_vboVadim Girlin2011-12-061-0/+3
| | | | | | | | | | This patch should prevent the crashes when some shaders are absent, see https://bugs.freedesktop.org/show_bug.cgi?id=43341 Note this is a candidate for the stable branch. Signed-off-by: Vadim Girlin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* r600g: fix error path and use util_slab_freeJerome Glisse2011-12-051-1/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* nv50/nvc0: fix crash when channel allocation failsMarcin Slusarz2011-12-022-2/+4
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* i915g: Implement GL_STREAM_* for textures by using untiled textures.Stéphane Marchesin2011-12-011-1/+1
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* i915g: Add unsupported PIPE_SHADER_CAP_OUTPUT_READ to silence warnings.Stéphane Marchesin2011-12-011-0/+2
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* gallium/failover: Remove the deprecated module.Kai Wasserbäch2011-11-307-1169/+0
| | | | | Signed-off-by: Kai Wasserbäch <[email protected]> Signed-off-by: José Fonseca <[email protected]>
* gallium/cell: Remove the driver.Kai Wasserbäch2011-11-2973-19259/+0
| | | | | | | Complicates Gallium3D development and doesn't seem to have active users. Signed-off-by: Kai Wasserbäch <[email protected]> Signed-off-by: José Fonseca <[email protected]>
* gallium/auxiliary: Remove os_stream.José Fonseca2011-11-291-9/+8
| | | | | | XP kernel mode was the only subsystem lacking stdio FILES. Reviewed-by: Brian Paul <[email protected]>
* i965g: Delete this driver.Kai Wasserbäch2011-11-2996-35580/+0
| | | | | | | Never completed, and no plans to do so. Signed-off-by: Kai Wasserbäch <[email protected]> Signed-off-by: José Fonseca <[email protected]>
* r600g: add framebuffer support for 2/10/10/10 integerDave Airlie2011-11-272-0/+4
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* r600g: add int support for 2/10/10/10 format.Dave Airlie2011-11-271-0/+3
| | | | | | integer wasn't set properly for the non-uniform types. Signed-off-by: Dave Airlie <[email protected]>
* android: pass -std=c99 by defaultChia-I Wu2011-11-264-7/+0
| | | | | Several modules expect a C99 compiler already. It is also the default for Makefile build.
* softpipe: s/int/unsigned/ to be consistent in alpha test codeBrian Paul2011-11-231-2/+2
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* softpipe: remove pointless break stmtBrian Paul2011-11-231-1/+0
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* i915g: don't set alpha to 1 for RGBX and BGRXVasily Khoruzhick2011-11-231-2/+1
| | | | | | | | This patch fixes regression introduced in 1f3c5eae5c4be582e50c2d4d7950424d86059c45 Signed-off-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
* r600g: handle all remaining CAPsMarek Olšák2011-11-221-0/+6
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* r600g: remove default case statements in get_paramMarek Olšák2011-11-221-9/+3
| | | | This will throw a compile warning if there's an unhandled CAP.
* r300g: re-order shaders CAPsMarek Olšák2011-11-221-7/+6
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* r300g: handle SHADER_CAP_OUTPUT_READMarek Olšák2011-11-221-0/+2
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* r300g: remove default case statements in get_paramMarek Olšák2011-11-221-8/+2
| | | | This will throw a compile warning if there's an unhandled CAP.
* u_vbuf_mgr: rename to u_vbufMarek Olšák2011-11-224-6/+6
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* gallium: separate out floating-point CAPs into its own enumMarek Olšák2011-11-2217-100/+108
| | | | | | | | | | | | | | | The motivation behind this is to add some self-documentation in the code about how each CAP can be used. The idea is: - enum pipe_cap is only valid in get_param - enum pipe_capf is only valid in get_paramf Which CAPs are floating-point have been determined based on how everybody except svga implemented the functions. svga have been modified to match all the other drivers. Besides that, the floating-point CAPs are now prefixed with PIPE_CAPF_.
* gallium: remove PIPE_CAP_GLSL and enable GLSL unconditionallyMarek Olšák2011-11-2211-32/+0
| | | | | Only i965g does not enable GLSL, but that driver has been unmaintained and bitrotting for quite a while anyway.
* i915g: implement RGBX and BGRX render targetsVasily Khoruzhick2011-11-222-2/+7
| | | | | | | | | | They're not supported by hw directly, but it's easy to emulate them with a shader swizzling fixup. Signed-off-by: Vasily Khoruzhick <[email protected]> [danvet: The important thing is to write a 1 to the unused alpha channel, the ddx is relying on this for render accel.] Signed-off-by: Daniel Vetter <[email protected]>
* r600g: handle PIPE_SHADER_CAP_OUTPUT_READVadim Girlin2011-11-211-0/+2
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r300g: set max_index to 0xffffff if there are no per-vertex attribsMarek Olšák2011-11-201-2/+11
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* u_vbuf_mgr: correctly compute max vertex count from hw buffersMarek Olšák2011-11-201-1/+8
| | | | | | | | And update r300g. This is different from util_draw_max_index in how it obtains vertex elements and that it doesn't have to call util_format_description due to additional precomputed data in vertex elements.
* r600g: use u_vbuf_mgr to set/get the index bufferMarek Olšák2011-11-202-14/+5
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* r300g: use u_vbuf_mgr to set/get the index bufferMarek Olšák2011-11-203-24/+12
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* r600g: set MIN/MAX_VTX_INDX to 0 and ~0, respectivelyMarek Olšák2011-11-201-10/+4
| | | | | | | The CS checker doesn't check the regs and the state-tracker-provided values are not to be trusted. This also removes the hack for non-zero index bias.
* r300g: always set VF_MIN_VTX_INDX to 0Marek Olšák2011-11-201-11/+10
| | | | It's not really useful to have non-zero there.
* r600g: don't change the order of writes in merge_inst_groupVadim Girlin2011-11-171-1/+14
| | | | | | | | | | | | | | Merge may produce incorrect order of operations for r600-eg: x: inst1 R0.x, ... ; //from current group ... t: inst0 R0.x, ... ; //from previous group, same destination Result of inst1 will be lost. So compare destinations and don't allow this. Signed-off-by: Vadim Girlin <[email protected]>
* nvc0: add support for GF119 (NVD9)Ben Skeggs2011-11-171-0/+1
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* r600g: fix the representation of control-flow instructionsMarek Olšák2011-11-159-426/+536
| | | | | | | | | | | | | | | | | | | | | | | | | | We need something that looks like a compiler and not like some hacker put some functions together. /rant This is a band-aid for these two problems: - The R600 and EG control-flow instructions appear in switch statements next to each other, causing conflicts when adding new instructions. - The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29 to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST is 22:29. To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23, or 26 (directly in the definitions), such that it can be just or'd when making bytecode without any shifting. All switch statements have been divided into two, one for R600 and the other for EG. Of course, there is a better way to do this, but that is left for future work. Tested on RV730 and REDWOOD with no regressions. v2: minor cleanup as per Alex's comment. Reviewed-by: Alex Deucher <[email protected]>
* r600g: mask write for fake VS export componentsVadim Girlin2011-11-141-4/+4
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* r600g: fix op3 & write in merge_inst_groupsVadim Girlin2011-11-141-1/+1
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* r600g: set max max tex/vtx instructions count to 16 for caymanAlex Deucher2011-11-141-3/+1
| | | | | | Cayman is 16 as well. Signed-off-by: Alex Deucher <[email protected]>
* r600g: set max tex/vtx instructions count to 16 for evergreenVadim Girlin2011-11-141-1/+1
| | | | | | | According to evergreen-isa doc 16 is max value for evergreen. More than 16 doesn't work for me. Signed-off-by: Vadim Girlin <[email protected]>
* llvmpipe: Silent warnings about undeclared llvmpipe_check_render_cond.José Fonseca2011-11-142-0/+2
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