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* iris: Set patch count threshold in 3DSTATE_HSSagar Ghuge2020-03-231-0/+7
* panfrost: Align Android makefiles with recent changesRoman Stratiienko2020-03-232-1/+4
* etnaviv: nir: add compile_check_limitsJonathan Marek2020-03-221-38/+73
* vbo,gallium: make glBegin/End buffer size configurable by driversMarek Olšák2020-03-211-0/+3
* lima: add support for R and RG formatsVasily Khoruzhick2020-03-207-37/+157
* lima: split pixel and texel format tablesVasily Khoruzhick2020-03-204-46/+78
* zink/spirv: do not use bitwise operations on booleansErik Faye-Lund2020-03-201-5/+22
* freedreno: Switch to exposing only half-integer pixel centers.Eric Anholt2020-03-191-1/+5
* r600: Fix build error in sfn_nir_lower_fs_out_to_vector.cppJohn Stultz2020-03-191-1/+1
* vc4_bufmgr: Remove duplicative VC definitionJohn Stultz2020-03-191-8/+0
* etnaviv: Avoid shift overflowJohn Stultz2020-03-191-1/+1
* Android.mk: Tweak MESA_ENABLE_LLVM checksJohn Stultz2020-03-191-0/+4
* intel/iris: Always initialize CCS to 0Jason Ekstrand2020-03-191-13/+1
* gallium/swr: spin-lock performance improvementTomasz Pyra2020-03-191-1/+14
* intel/blorp: Add support for swizzling fast-clear colorsJason Ekstrand2020-03-181-0/+1
* lima: decode depth/stencil write bits in RSWVasily Khoruzhick2020-03-181-2/+10
* lima: implement zsbuf reloadIcenowy Zheng2020-03-186-17/+84
* lima: disable Z16 formatVasily Khoruzhick2020-03-182-3/+0
* ac: unify denorm setting enforcementMarek Olšák2020-03-171-18/+1
* freedreno/a5xx: Fix min-vs-mag filtering decisions on non-mipmap tex.Eric Anholt2020-03-171-1/+10
* intel/blorp: Plumb the stage through blorp upload_shaderCaio Marcelo de Oliveira Filho2020-03-172-2/+2
* zink: zero out zink_render_pass_stateDuncan Hopkins2020-03-171-1/+1
* llvmpipe: Use uintptr_t for pointer valuesMichel Dänzer2020-03-171-2/+2
* lima/gpir: fix crash in schedule_insert_ready_list()Vasily Khoruzhick2020-03-161-0/+2
* lima/gpir: add better lowering for ftruncVasily Khoruzhick2020-03-163-9/+11
* lima/gpir: kill dead writes to regs in DCEVasily Khoruzhick2020-03-161-0/+28
* lima/gpir: Optimize nots created from branch loweringConnor Abbott2020-03-161-0/+67
* lima/gpir: Optimize conditional break/continueConnor Abbott2020-03-164-0/+126
* lima/gpir: Make lima_gpir_node_insert_child() usefulConnor Abbott2020-03-161-1/+1
* panfrost: Fix gnu-empty-initializer error.Vinson Lee2020-03-161-1/+1
* iris: allow compression conditionally for images on gen12Tapani Pälli2020-03-161-0/+18
* iris: determine aux usage during predraw and state setupTapani Pälli2020-03-162-8/+18
* iris: move existing image format fallback as a helper functionTapani Pälli2020-03-163-22/+32
* iris: provide dummy iris_image_view_aux_usageTapani Pälli2020-03-162-0/+13
* intel/compiler: detect if atomic load store operations are usedTapani Pälli2020-03-162-1/+5
* iris: use the images_used mask in resolve passTapani Pälli2020-03-161-3/+3
* gallium/swr: use ElementCount type arguments for getSplat()Jan Zielinski2020-03-134-17/+57
* etnaviv: enable shareable shadersChristian Gmeiner2020-03-131-0/+1
* etnaviv: get rid of etna_spec in etna_contextChristian Gmeiner2020-03-1313-76/+98
* iris: Use ISL_AUX_USAGE_STC_CCS for stencil CCSJason Ekstrand2020-03-123-4/+17
* iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZJason Ekstrand2020-03-123-10/+22
* ac: add radeon_info::use_late_alloc to control LATE_ALLOC globallyMarek Olšák2020-03-122-6/+8
* radeonsi: tune primitive binning for small chipsMarek Olšák2020-03-121-3/+9
* radeonsi: set better tessellation tunables on gfx9 and gfx10Marek Olšák2020-03-121-1/+8
* radeonsi/gfx10: cache metadata in L2 on small chipsMarek Olšák2020-03-121-8/+19
* iris: toggle on PIPE_CAP_MIXED_COLOR_DEPTH_BITSTapani Pälli2020-03-121-0/+1
* panfrost: Promote midgard_program to panfrost/utilAlyssa Rosenzweig2020-03-112-2/+2
* gallium: add PIPE_CAP_DRAW_INFO_START_WITH_USER_INDICESMarek Olšák2020-03-111-0/+1
* vc4: Fix query_dmabuf_modifiers mis-reporting external_only propertyChris Lord2020-03-111-1/+3
* lima/gpir: print acc ops even if we have only one sourceVasily Khoruzhick2020-03-111-4/+2
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