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* radeon: only suspend queries on flush if they haven't been suspended yetNicolai Hähnle2015-11-302-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Non-timer queries are suspended during blits. When the blits end, the queries are resumed, but this resume operation itself might run out of CS space and trigger a flush. When this happens, we must prevent a duplicate suspend during preflush suspend, and we must also prevent a duplicate resume when the CS flush returns back to the original resume operation. This fixes a regression that was introduced by: commit 8a125afa6e88a3eeddba8c7fdc1a75c9b99d5489 Author: Nicolai Hähnle <[email protected]> Date: Wed Nov 18 18:40:22 2015 +0100 radeon: ensure that timing/profiling queries are suspended on flush The queries_suspended_for_flush flag is redundant because suspended queries are not removed from their respective linked list. Reviewed-by: Marek Olšák <[email protected]> Reported-by: Axel Davy <[email protected]> Cc: "11.1" <[email protected]> Tested-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 9e5e702cfb380af461062c96d974027da8d5f17a)
* radeonsi/compute: Use the compiler's COMPUTE_PGM_RSRC* register valuesTom Stellard2015-11-292-31/+7
| | | | | | | | | | The compiler has more information and is able to optimize the bits it sets in these registers. Reviewed-by: Marek Olšák <[email protected]> CC: <[email protected]> (cherry picked from commit 89851a296536b89364fe6104d13330975788f960)
* radeonsi: Rename si_shader::ls_rsrc{1,2} to si_shader::rsrc{1,2}Tom Stellard2015-11-293-6/+6
| | | | | | | In the future, these will be used by other shaders types. Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 95e051091676584fd7bfba9d0316c3747bf17f35)
* radeon/uvd: uv pitch separation for stoneyBoyuan Zhang2015-11-292-1/+6
| | | | | | | | | v2: set the behaviour default for future ASICs. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]> Cc: [email protected] (cherry picked from commit f55f134a033a61d67c2a71bbe57f85eb3484eec1)
* freedreno/a4xx: use a factor of 32767 for snorm8 blendingIlia Mirkin2015-11-291-5/+34
| | | | | | | | | | | | | It appears that the hardware wants the integer to be scaled the same way that the hardware representation is. snorm16 uses one of the float factors, so this is only relevant for snorm8. This fixes a number of subcases of bin/fbo-blending-formats GL_EXT_texture_snorm Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 81b16350fa2e7c1b47d976be12d2313283f22e24)
* nv50/ir: fix (un)spilling of 3-wide resultsIlia Mirkin2015-11-291-4/+42
| | | | | | | | | | There is no 96-bit load/store operations, so we have to split it up into a 32-bit parts, with a split/merge around it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90348 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0 11.1" <[email protected]> (cherry picked from commit 4deb118d06e96731f3481daa72c201d7258bfbbb)
* nv50,nvc0: properly handle buffer storage invalidation on dsa bufferIlia Mirkin2015-11-292-15/+17
| | | | | | | | | | In case that the buffer has no bind at all, assume it can be a regular buffer. This can happen on buffers created through the ARB_dsa interfaces. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0 11.1" <[email protected]> (cherry picked from commit ad5f6b03e793b9390e3b9f3eca68bd43f9d809eb)
* nouveau: use the buffer usage to determine placement when no bindingIlia Mirkin2015-11-291-2/+6
| | | | | | | | | | | | With ARB_direct_state_access, buffers can be created without any binding hints at all. We still need to allocate these buffers to VRAM or GART, as we don't have logic down the line to place them into GPU-mappable space. Ideally we'd be able to shift these things around based on usage. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92438 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0 11.1" <[email protected]> (cherry picked from commit 079f713754a9e5d7802b655d54320bd37f24fbfa)
* vc4: Just put USE_VC4_SIMULATOR in DEFINES.Eric Anholt2015-11-292-5/+0
| | | | | | | | | In the pipe-loader reworks, it was missed in one of the new directories it was used. Cc: [email protected] Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit a39eac80fd491abb990b0b77dd5e4adc5b9c53e1)
* freedreno/a4xx: disable blending and alphatest for integer rt0Ilia Mirkin2015-11-291-2/+13
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 22aeb0c5684cec11fd8cb4a159b10edbcfe8d6ec)
* freedreno/a4xx: fix independent blendIlia Mirkin2015-11-292-2/+3
| | | | | | | | This fixes the ext_draw_buffers2 and arb_draw_buffers_blend tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 4c170d9e1d5b4e3e642b0241fd1e33948e60df9b)
* freedreno/a4xx: fix 3d texture setupIlia Mirkin2015-11-293-3/+7
| | | | | | | | | | | Same fix as on a3xx - set the second (tiny) layer size bitfield to the smallest level's size so that the hw knows not to minify beyond that. This fixes texelFetch sampler3D piglits. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 740eb63aa78a48bae5248b72f023d725ed82d1b3)
* freedreno/a4xx: only align slices in non-layer_first texturesIlia Mirkin2015-11-291-2/+4
| | | | | | | | | | | | | When layer is the container, slices are tightly packed inside of each layer. We don't need any additional alignment. On a3xx, each slice contains all the layers, so having alignment makes sense. This fixes a whole slew of array-related piglits, including texelFetch and tex-miplevel-selection varieties. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit ecb0dcd34c9bb31b240a213cd17c236b224cd290)
* {st,targets}/dri: use static/dynamic pipe-loaderEmil Velikov2015-11-211-3/+0
| | | | | | | | | | Covert DRI to use only the pipe-loader interface. With drisw_create_screen and kms_swrast_create_screen replaced by their pipe-loader equivalent, we can now drop them. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Rob Clark <[email protected]>
* configure: use HAVE_DRISW_KMS when handling kms swrastEmil Velikov2015-11-211-1/+1
| | | | | | | Using HAVE_DRI2 to manage it seems counter-intuitive. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Rob Clark <[email protected]>
* gallium/trace: remove useless NULL check from trace_screen_create()Emil Velikov2015-11-211-3/+0
| | | | | | | | | Currently every target makes sure that the screen is non-null prior to using the debug (trace including) wrappers. If that no longer holds true we want to know and fix this ASAP rather than silently bailing out. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Rob Clark <[email protected]>
* freedreno/a4xx: add missing formats to enable ARB_vertex_type_2_10_10_10_revIlia Mirkin2015-11-202-4/+8
| | | | | | | Same as commit 84d087aea but for a4xx. The RE'd enums had the same issue too. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: use hardware RGTC texture samplersIlia Mirkin2015-11-206-24/+19
| | | | | | | | | a4xx hardware has real support for RGTC so there's no need to fake it like we do on a3xx. Undo the hacks, and keep track of an "internal format" of a resource, which on a3xx will be different, triggering the transfer-time conversions to take place. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: hook up RGB565 formatIlia Mirkin2015-11-202-1/+2
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: logic op handlingIlia Mirkin2015-11-206-29/+35
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: add 16-bit unorm/snorm format texturing/renderingIlia Mirkin2015-11-202-25/+47
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: point regid to "red" even for alpha-only rb formatsIlia Mirkin2015-11-201-7/+0
| | | | | | | | | Looks like a4xx hw does this in a more standard way and we don't need to hack around it like we do on a3xx. Fixes GL_ALPHA formats in fbo-blending-formats, fbo-colormask-formats, and fbo-alphatest-formats. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* freedreno: always set all border colorsIlia Mirkin2015-11-201-30/+8
| | | | | | | Instead of playing the guessing game as to which texture format reads from which border color encoding type, just write both of them always. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: fix dst_alpha blend for RGBX render targetsIlia Mirkin2015-11-203-5/+32
| | | | | | | There are not native RGBX render formats, so we must manually force dst_alpha to be one, same as for a3xx. Signed-off-by: Ilia Mirkin <[email protected]>
* radeon: re-prepare query buffers on begin_query for predicate queriesNicolai Hähnle2015-11-202-15/+18
| | | | | | | | | | | | | | | | The point of prepare_buffer is to ensure that the query buffer contains valid initial data for conditional rendering: as long as the buffer is initialized correctly, the GPU is able to tell whether query results have been written already (and wait or fall back to unconditional rendering if desired). This means prepare_buffer needs to be called again when a buffer is reused. Conversely, for queries that cannot be used for conditional rendering (notably pipeline statistics), we can re-use buffers immediately, and they do not need to be initialized. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Andy Furniss <[email protected]>
* radeon: reset query buffers for PIPE_QUERY_TIMESTAMPNicolai Hähnle2015-11-201-8/+18
| | | | | | | | | | Since begin_query is not called for this query type, we need to reset the query buffer state in end_query instead. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93015 Reviewed-by: Marek Olšák <[email protected]> Tested-by: Andy Furniss <[email protected]> Tested-by: Mathias Tillman <[email protected]>
* svga: add num-bytes-uploaded HUD queryBrian Paul2015-11-205-6/+30
| | | | | | | | To graph the number of bytes uploaded to GPU per frame (vertex buffer data, constant buffer data, texture data, etc). Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* svga: add some sanity check assertions in svga_buffer_transfer_map()Brian Paul2015-11-201-0/+5
| | | | | | | Make sure y and z values of buffers are as expected. Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* nv50: expose two groups of compute-related MP perf countersSamuel Pitoiset2015-11-206-2/+63
| | | | | | | This turns on GL_AMD_performance_monitor. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* radeon/vce: disable two pipe mode for stoneyLeo Liu2015-11-201-1/+2
| | | | | | | | Only one encoding pipe available for Stoney Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: add new firmware interface supportLeo Liu2015-11-204-5/+262
| | | | | | | | Add new interface to create and encode Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon: ensure that timing/profiling queries are suspended on flushNicolai Hähnle2015-11-202-9/+6
| | | | | | | The queries_suspended_for_flush flag is redundant because suspended queries are not removed from their respective linked list. Reviewed-by: Marek Olšák <[email protected]>
* gallium: add the concept of batch queriesNicolai Hähnle2015-11-202-0/+2
| | | | | | | | | | | | | | | | | Some drivers (in particular radeon[si], but also freedreno judging from a quick grep) may want to expose performance counters that cannot be individually enabled or disabled. Allow such drivers to mark driver-specific queries as requiring a new type of batch query object that is used to start and stop a list of queries simultaneously. v3: adjust recently added nv50 queries v2: documentation for create_batch_query Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* gallium: remove pipe_driver_query_group_info field typeNicolai Hähnle2015-11-201-4/+0
| | | | | | | | | | | | | | | | | | | This was only used to implement an unnecessarily restrictive interpretation of the spec of AMD_performance_monitor. The spec says A performance monitor consists of a number of hardware and software counters that can be sampled by the GPU and reported back to the application. I guess one could take this as a requirement that counters _must_ be sampled by the GPU, but then why are they called _software_ counters? Besides, there's not much reason _not_ to expose all counters that are available, and this simplifies the code. v3: add a missing change in the nouveau driver (thanks Samuel Pitoiset) Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Samuel Pitoiset <[email protected]>
* freedreno/a4xx: add BPTC supportIlia Mirkin2015-11-202-0/+8
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nir: Add nir_texop_samples_identical opcodeIan Romanick2015-11-191-0/+3
| | | | | | | | | | | This is the NIR analog to GLSL IR ir_samples_identical. v2: Don't add the second nir_tex_src_ms_index parameter. Suggested by Ken and Jason. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* freedreno/a4xx: fix 5_5_5_1 texture sampler formatIlia Mirkin2015-11-191-1/+1
| | | | | | | | This fixes teximage-colors, fbo-generatemipmap-formats, and probably others (in relation to the RGB5 formats, others still fail). Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* freedreno/a4xx: add depth clamp and halfz clipIlia Mirkin2015-11-193-4/+9
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: allow seamless cubemap filtering to be enabled per-textureIlia Mirkin2015-11-193-1/+3
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: support lod_biasIlia Mirkin2015-11-192-0/+7
| | | | | | | | | The lower layers assume that we support this, and it's been core since GL 1.4. This fixes a slew of piglit tests, especially around tex-miplevel-selection. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv50: allow using inline vertex data submit when gl_VertexID is usedSamuel Pitoiset2015-11-195-15/+46
| | | | | | | | | | | | | | | The hardware can actually generates vertexid when vertices come from a client-side buffer like when glDrawElements is used. This doesn't fix (or break) any piglit tests but it improves the previous attempt of Ilia (c830d19 "nv50: avoid using inline vertex data submit when gl_VertexID is used") The only disadvantage is that only works on G84+, but we don't really care of that weird and old NV50 chipset. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: add NV84_3D macroSamuel Pitoiset2015-11-193-3/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/a4xx: add fake RGTC support (required for GL3)Rob Clark2015-11-183-1/+22
| | | | | | | | | | The a4xx bits corresponding to 'freedreno/a3xx: add fake RGTC support (required for GL3)' TODO some more r/e.. maybe we get lucky and hw supports some of this directly? For now this will help us enable gl3. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: add compressed texture formatsRob Clark2015-11-182-2/+26
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2015-11-185-11/+37
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: expose GLSL 140 and fake MSAA for GL3.0/3.1 supportIlia Mirkin2015-11-181-2/+2
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix texture buffers, enable offsetsIlia Mirkin2015-11-183-14/+32
| | | | | | | | | | | | | | | The main issue is that the current logic looked into cso->u.tex, which is the wrong side of the union to look into for texture buffers. While I was at it, it was easy enough to add the logic to handle offsets (first_element). - reduce texture buffer size limit (determined experimentally) - don't look at first/last levels, instead look at first/last element - include the first element offset - set offset alignment to 16 (determined experimentally) Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: add support for conditional rendering, required for GL3.0Ilia Mirkin2015-11-186-6/+56
| | | | | | | | | A smarter implementation would make it possible to attach this to emit state for the BY_REGION versions to avoid breaking the tiling. But this is a start. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add fake RGTC support (required for GL3)Ilia Mirkin2015-11-185-27/+175
| | | | | | | | | | | | Also throw in LATC while we're at it (same exact format). This could be made more efficient by keeping a shadow compressed texture to use for returning at map time. However... it's not worth it for now... presumably compressed textures are not updated often. Lastly fix up Z32S8 transfers to non-0 layers. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: add missing formats to enable ARB_vertex_type_2_10_10_10_revIlia Mirkin2015-11-182-4/+8
| | | | | | | | | The previously RE'd formats were from an ES driver implementing OES_vertex_type_10_10_10_2 and thus backwards. A future change could add the 2_10_10_10 support. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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