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* r600g: merge alu groupsChristian König2011-01-132-37/+150
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* r600g: implement replacing gpr with pv and psChristian König2011-01-133-5/+63
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* r600g: add missing RECIPSQRT_CLAMPED to r600_bc_get_num_operandsChristian König2011-01-131-0/+1
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* r600g: rework bank swizzle codeChristian König2011-01-132-183/+174
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* r600g: fix alu slot assignmentChristian König2011-01-131-15/+167
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* r600g: optimize away CF ALU instructions even if type doesn't matchChristian König2011-01-131-3/+16
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* nvc0: identify POINT_RASTER_RULES, add POINT_SMOOTH stateChristoph Bumiller2011-01-134-19/+42
| | | | | | Point smoothing requires rasterization rules to be set to OGL. Sorry for the extra noise caused by the header update.
* r600g: Silence uninitialized variable warnings.Vinson Lee2011-01-131-4/+4
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* nvc0: disable calling of sw methods we don't implementBen Skeggs2011-01-131-0/+4
| | | | | | | Left in the code as a marker of what NVIDIA do, just in case we need to do this some day. Signed-off-by: Ben Skeggs <[email protected]>
* nvc0: fix mp_stack_bo relocationBen Skeggs2011-01-131-2/+2
| | | | | | | | | | Fixes a PT_NOT_PRESENT error cause by: - allocating in VRAM - emitting GART relocs to 0x17bc/0x17c0, moving the buffer - telling the bufmgr that the buffer should be in VRAM when we use it, but not correcting the value sent to 0x17bc/0x17c0. Signed-off-by: Ben Skeggs <[email protected]>
* noop: change var type to silence warningBrian Paul2011-01-121-1/+1
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* r600g: also look at tex inst when for maximum gpu countChristian König2011-01-121-1/+7
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* r600g: implement output modifiers and use them to further optimize LRPChristian König2011-01-124-0/+33
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* r600g: use special constants for 0, 1, -1, 1.0f, 0.5f etcChristian König2011-01-121-12/+44
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* r600g: optimize temp register handling for LRPChristian König2011-01-121-34/+38
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* r600g: optimize away CF_INST_POPChristian König2011-01-123-3/+29
| | | | | If last instruction is an CF_INST_ALU we don't need to emit an additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
* r600g: make dumping of shaders an optionChristian König2011-01-121-4/+14
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* r600g: fix alu dumpingChristian König2011-01-121-19/+13
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* r600g: improve r600_bc_dumpChristian König2011-01-121-28/+131
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* r600g: texture instructions also work fine with TGSI_FILE_INPUTChristian König2011-01-121-1/+3
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* r600g: DP4 also supports writemaskingChristian König2011-01-121-8/+6
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* r600g: Why all this fiddling with tgsi_helper_copy?Christian König2011-01-121-21/+41
| | | | | | | | tgsi_helper_copy is used on several occasions to copy a temporary result into the real destination register to emulate writemasks for OP3 and reduction operations. According to R600 ISA that's unnecessary. This patch fixes this use for MAD, CMP and DP4.
* r600g: fix tex and vtx joiningChristian König2011-01-121-2/+2
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* r600g: Fixed SIN/COS/SCS for the case where the operand is a literal.Tilman Sauerbeck2011-01-111-2/+15
| | | | | Signed-off-by: Tilman Sauerbeck <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: move user fence into base radeon structureJerome Glisse2011-01-111-3/+0
| | | | | | | This avoid any issue when context is free and we still try to access fence through radeon structure. Signed-off-by: Jerome Glisse <[email protected]>
* r300g: add debug option for buffer upload loggingMarek Olšák2011-01-103-0/+9
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* noop: make noop useable like trace or rbugJerome Glisse2011-01-092-47/+35
| | | | | | | | If you want to enable noop set GALLIUM_NOOP=1 as an env variable. You need first to enable noop wrapping for your driver see change to src/gallium/targets/dri-r600/ in this commit as an example. Signed-off-by: Jerome Glisse <[email protected]>
* r300g: do not upload the same user buffer several timesMarek Olšák2011-01-091-1/+3
| | | | Performance++.
* nvc0: implement queriesChristoph Bumiller2011-01-0910-23/+432
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* i965g: fix warningsDave Airlie2011-01-092-2/+1
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* i965g: update intel_decode from upstream.Dave Airlie2011-01-094-137/+432
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* i965g: update disassembler code from classic.Dave Airlie2011-01-098-34/+95
| | | | still a bit of work to do, the winsys gen setting is a bit of a hack.
* i965g: update brw_defines.h from classic driverDave Airlie2011-01-093-37/+397
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* i965g: update brw_structs.h from classic driver.Dave Airlie2011-01-093-88/+288
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* i965g: update to similiar gen stuff as i965Dave Airlie2011-01-0933-151/+173
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* r300g: fix crash when flushing ZMASKMarek Olšák2011-01-095-92/+81
| | | | | | | | | | https://bugs.freedesktop.org/show_bug.cgi?id=32912 The fix is to call update_derived_state before user buffer uploads. I've also moved some code around. Unfortunately, there are still some ZMASK-related bugs which cause misrendering, i.e. flushing doesn't always work and glean/fbo fails.
* nvfx,nv50: pipe_reference the constant buffersChristoph Bumiller2011-01-082-6/+5
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* nvc0: fix primitive restart in immediate modeChristoph Bumiller2011-01-082-9/+18
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* r300g: fix a surface leak when flushing ZMASKMarek Olšák2011-01-081-0/+1
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* r300g: rework command submission and resource space checkingMarek Olšák2011-01-085-97/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The motivation behind this rework is to get some speed by reducing CPU overhead. The performance increase depends on many factors, but it's measurable (I think it's about 10% increase in Torcs). This commit replaces libdrm's radeon_cs_gem with our own implemention. It's optimized specifically for r300g, but r600g could use it as well. Reloc writes and space checking are faster and simpler than their counterparts in libdrm (the time complexity of all the functions is O(1) in nearly all scenarios, thanks to hashing). (libdrm's radeon_bo_gem is still being used in the driver.) It works like this: cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and also adds the size of 'buf' to the used_gart and used_vram winsys variables based on the domains, which are simply or'd for the accounting purposes. The adding is skipped if the reloc is already present in the list, but it accounts any newly-referenced domains. cs_validate is then called, which just checks: used_vram/gart < vram/gart_size * 0.8 The 0.8 number allows for some memory fragmentation. If the validation fails, the pipe driver flushes CS and tries do the validation again, i.e. it validates only that one operation. If it fails again, it drops the operation on the floor and prints some nasty message to stderr. cs_write_reloc(cs, buf) just writes a reloc that has been added using cs_add_reloc. The read_domain and write_domain parameters have been removed, because we already specify them in cs_add_reloc. The space checking has been tested by putting small values in vram/gart_size variables.
* nvc0: fix reloc domain conflict on buffer migrationChristoph Bumiller2011-01-081-12/+12
| | | | | Occurred because the code assumed that buf->domain would remain equal to old_domain.
* nvc0: upload user buffers only from draw info min to max indexChristoph Bumiller2011-01-082-3/+9
| | | | There are actually applications that profit immensely from this.
* nvc0: fix emission of first 3 u8 indices to RING_NIChristoph Bumiller2011-01-081-1/+1
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* nvc0: reset mt transfer address after read loop over layersChristoph Bumiller2011-01-081-0/+1
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* nvc0: tie buffer memory release to the buffer fenceChristoph Bumiller2011-01-081-4/+7
| | | | | ... instead of the next fence to be emitted. This way we have a chance to reclaim the storage earlier.
* r300g: Remove invalid assertion.Łukasz Krotowski2011-01-081-1/+0
| | | | | | | Invalid after be1af4394e060677b7db6bbb8e3301e38a3363da (user buffer creation with width0 == ~0). Signed-off-by: Marek Olšák <[email protected]>
* r600g: Also set const_offset if the buffer is not a user buffer in ↵Henri Verbeet2011-01-071-0/+2
| | | | r600_upload_const_buffer().
* r600g: Update some comments for Evergreen.Henri Verbeet2011-01-071-1/+3
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* r600g: Split ALU clauses based on used constant cache lines.Henri Verbeet2011-01-072-21/+129
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* r600g: Consistently use the copy of the alu instruction in ↵Henri Verbeet2011-01-071-9/+9
| | | | r600_bc_add_alu_type().
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