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* freedreno/a3xx: WFI fixes/cleanupRob Clark2014-06-225-48/+41
| | | | | | | | | | | | | | | Blob driver seems to need WFI in some cases after CP_EVENT_WRITE, implying that this is asynchronous and should reset needs_wfi. Also, CP_INVALIDATE_STATE seems to need WFI. But CP_LOAD_STATE does not. The blob driver also puts WFIs before writing GRAS_CL_VPORT registers. The latter may be a work-around, as these registers should be banked/ context registers. I haven't yet found a lockup that this averts, but I expect viewport to change infrequently so out of paranoia I will keep these for now. Signed-off-by: Rob Clark <[email protected]>
* scons: avoid building any piece of i915Emil Velikov2014-06-211-12/+0
| | | | | | | Leftover from commit c21fca8bf24. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* r600g/compute: Use gallium util functions for double listsBruno Jiménez2014-06-202-111/+46
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Map only against intermediate buffersBruno Jiménez2014-06-201-6/+4
| | | | | | | | | | | | With this we can assure that mapped buffers will never change its position when relocating the pool. This patch should finally solve the mapping bug. v2: Use the new is_item_in_pool util function, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Implement compute_memory_demote_itemBruno Jiménez2014-06-202-0/+54
| | | | | | | | | | This function will be used when we want to map an item that it's already in the pool. v2: Use temporary variables to avoid so many castings in functions, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Avoid problems when promoting items mapped for readingBruno Jiménez2014-06-201-4/+8
| | | | | | | | | | | Acording to the OpenCL spec, it is possible to have a buffer mapped for reading and at read from it using commands or buffers. With this we can keep the mapping (that exists against the temporary item) and read with a kernel (from the item we have just added to the pool) without problems. Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Only move to the pool the buffers marked for promotingBruno Jiménez2014-06-202-60/+91
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: divide the item list in twoBruno Jiménez2014-06-202-51/+49
| | | | | | | Now we will have a list with the items that are in the pool (item_list) and the items that are outside it (unallocated_list) Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Add statuses to the compute_memory_itemsBruno Jiménez2014-06-202-1/+18
| | | | | | | | | | These statuses will help track whether the items are mapped or if they should be promoted to or demoted from the pool v2: Use the new is_item_in_pool util function, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Add an util function to know if an item is in the poolBruno Jiménez2014-06-201-0/+5
| | | | | | | Every item that has been placed in the pool must have start_in_dw different from -1. Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: Add an intermediate resource for OpenCL buffersBruno Jiménez2014-06-203-6/+41
| | | | | | | | | | | | | | | | | | | This patch changes completely the way buffers are added to the compute_memory_pool. Before this, whenever we were going to map a buffer or write to or read from it, it would get placed into the pool. Now, every unallocated buffer has its own r600_resource until it is allocated in the pool. NOTE: This patch also increase the GPU memory usage at the moment of putting every buffer in it's place. More or less, the memory usage is ~2x(sum of every buffer size) v2: Cleanup v3: Use temporary variables to avoid so many castings in functions, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Adapt to AMDGPU.rsq intrinsic change in LLVM 3.5Michel Dänzer2014-06-191-0/+4
| | | | | Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: Michel Dänzer <[email protected]>
* nv30: hack to avoid errors on unexpected color/zeta combinationsIlia Mirkin2014-06-191-0/+17
| | | | | | | | | | This is just a hack, it should be possible to create a temporary zeta surface and render to that instead. However that's more complicated and this avoids the render being entirely broken and errors being reported by the card. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv30: tidy screen caps, add missing onesIlia Mirkin2014-06-191-16/+17
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: avoid dangling references to deleted contextsIlia Mirkin2014-06-191-0/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv30: plug some memory leaks on screen destroy and shader compileIlia Mirkin2014-06-192-0/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* nv50: organize screen capsIlia Mirkin2014-06-191-67/+57
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: organize screen capsIlia Mirkin2014-06-191-61/+51
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: remove vport_int hack and instead use the usual state validationIlia Mirkin2014-06-193-11/+3
| | | | | | | | Commit ad4dc772 fixed an issue with the viewport not being restored correctly. However it's rather hackish and confusing. Instead just mark the viewport dirty and let the viewport validation take care of it. Signed-off-by: Ilia Mirkin <[email protected]>
* r300g: don't advertize PIPE_FORMAT_B10G10R10X2_UNORM on < r500David Heidelberger2014-06-191-0/+1
| | | | | Signed-off-by: David Heidelberger <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: implement ARB_texture_query_lodMarek Olšák2014-06-192-25/+40
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: pass ARB_conservative_depth parameters to the hardwareMarek Olšák2014-06-194-1/+29
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium: implement ARB_texture_query_levelsMarek Olšák2014-06-191-0/+3
| | | | | | | | | The extension is always supported if GLSL 1.30 is supported. Softpipe and llvmpipe support is also added (trivial). Radeon and nouveau support is already done. Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: cosmetic changes in si_shader.cMarek Olšák2014-06-191-18/+13
| | | | reviewed by Michel Dänzer
* radeonsi: implement ARB_texture_gather and Gather functions from GLSL 4.00Marek Olšák2014-06-192-12/+123
| | | | | | All ARB_texture_gather and gather-related ARB_gpu_shader5 piglit tests pass. reviewed by Michel Dänzer
* r600g: fix the max vertex shader input limitMarek Olšák2014-06-191-1/+1
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* radeon/uvd: disable VC-1 simple/main on UVD 2.xGrigori Goronzy2014-06-181-1/+4
| | | | | | | | | It's about as broken as on later UVD revisions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452 Cc: "10.1 10.2" <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: add sampling of 4:2:2 subsampled texturesGrigori Goronzy2014-06-183-40/+71
| | | | | | This makes 4:2:2 video surfaces work in VDPAU. Reviewed-by: Marek Olšák <[email protected]>
* util/u_format: move utility function from r600gGrigori Goronzy2014-06-181-11/+1
| | | | | We need this for radeonsi, and it might be useful for other drivers, too.
* radeon/vce: set number of cpbs based on levelLeo Liu2014-06-182-5/+61
| | | | | | | v2: add error check for cpb size 0 Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: implement h264 level supportLeo Liu2014-06-181-1/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEXTobias Klausmann2014-06-162-2/+1
| | | | | | | Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer. Signed-off-by: Tobias Klausmann <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: implement multiple viewports/scissors, enable ARB_viewport_arrayTobias Klausmann2014-06-167-63/+113
| | | | | | Signed-off-by: Tobias Klausmann <[email protected]> [imirkin: mark things dirty on ctx switch, 3d blit] Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: make sure to mark first scissor dirty after blitIlia Mirkin2014-06-161-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2" <[email protected]>
* radeonsi: fixup sizes of shader resource and sampler arraysMarek Olšák2014-06-161-2/+2
| | | | | | | This was wrong for a very long time. I wonder if the array size has any effect on anything. Reviewed-by: Christian König <[email protected]>
* r600g/radeonsi: Remove default case from PIPE_COMPUTE_CAP_* switchMichel Dänzer2014-06-161-4/+3
| | | | | | This way, the compiler warns about unhandled caps. Reviewed-by: Marek Olšák <[email protected]>
* radeon/compute: Always report at least 1 compute unitTom Stellard2014-06-131-1/+1
| | | | | Some apps will abort if they detect 0 compute units. This fixes crashes in some OpenCV tests.
* freedreno/a3xx: vtx formatsRob Clark2014-06-132-63/+79
| | | | | | Add support for more vertex buffer formats. Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-06-134-16/+23
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: try for more squarish tile dimensionsRob Clark2014-06-131-3/+9
| | | | | | Worth about ~0.5fps in xonotic, for example. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix for null texturesRob Clark2014-06-132-6/+10
| | | | | | | | Some apps seem to give us a null sampler/view for texture slots which come before the last used texture slot. In particular 0ad triggers this. Signed-off-by: Rob Clark <[email protected]>
* llvmpipe: increase number of queries which can be binned simultaneously to 64Roland Scheidegger2014-06-131-1/+1
| | | | | | | | | | | Gallium (but not OpenGL) does allow nesting of queries, but there's no limit specified (d3d10 has no limit neither). Nevertheless, for practical purposes we need some limit in llvmpipe, otherwise we'd need more complex handling of queries as we need to keep track of all binned queries (this only affects queries which gather data past setup). A limit of 16 is too small though, while 64 would suffice. Reviewed-by: Jose Fonseca <[email protected]>
* radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITSBruno Jiménez2014-06-131-0/+7
| | | | | | | | v2: Add RADEON_INFO_ACTIVE_CU_COUNT as a define, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* r600g/compute: solve a bug introduced by ↵Bruno Jiménez2014-06-121-1/+1
| | | | | | | | | | | | | | | | | | | 2e01b8b440c1402c88a2755d89f40292e1f36ce5 That commit made possible that the items could be one just after the other when their size was a multiple of ITEM_ALIGNMENT. But compute_memory_prealloc_chunk still looked to leave a gap between items. Resulting in that we got an infinite loop when trying to add an item which would left no space between itself and the next item. Fixes piglit test: cl-custom-r600-create-release-buffer-bug And the test for alignment I have just sent: http://lists.freedesktop.org/archives/piglit/2014-June/011135.html Sorry about this. Reviewed-by: Tom Stellard <[email protected]>
* softpipe: fix pt->resource assert placementDave Airlie2014-06-111-1/+1
| | | | | | oops meant to move this. Signed-off-by: Dave Airlie <[email protected]>
* softpipe: enable AMD_vertex_shader_layer.Dave Airlie2014-06-111-1/+1
| | | | | | | This passes tests now on softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: enable GLSL 3.30 support.Dave Airlie2014-06-111-1/+1
| | | | | | | This enables GL3.3 on softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: bump the softpipe geometry limitsDave Airlie2014-06-111-1/+1
| | | | | | | This just aligns the limits with llvmpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add layered rendering support.Dave Airlie2014-06-117-9/+55
| | | | | | | This adds support for GL 3.2 layered rendering to softpipe. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* softpipe: add layering to the surface tile cache.Dave Airlie2014-06-115-72/+112
| | | | | | | | | | This adds the layer info to the tile cache. This changes clear_flags to be dynamically allocated as MAX_LAYERS seems like a too big step. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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