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* amd/common: get ME/PFP/CE firmware feature versions as wellNicolai Hähnle2017-09-131-0/+3
* radeonsi: rename variable to clarify its meaningNicolai Hähnle2017-09-131-10/+10
* radeonsi: make si_init_shader_selector_async staticNicolai Hähnle2017-09-132-2/+1
* radeonsi: fix segfault in descriptor dumpingNicolai Hähnle2017-09-131-0/+18
* ddebug: write out final driver log messages with GALLIUM_DDEBUG=alwaysNicolai Hähnle2017-09-133-2/+15
* swr/rast: Fetch compile state changesTim Rowley2017-09-133-6/+15
* swr/rast: adjust linux cpu topology identification codeTim Rowley2017-09-131-43/+38
* swr/rast: Missed conversion to SIMD_TTim Rowley2017-09-131-1/+1
* swr/rast: whitespace changesTim Rowley2017-09-131-0/+2
* swr/rast: add graph write to jit debug putputTim Rowley2017-09-131-3/+3
* swr/rast: Migrate memory pointers to gfxptr_t typeTim Rowley2017-09-139-36/+36
* swr/rast: Remove hardcoded clip/cull slot from clipperTim Rowley2017-09-131-14/+21
* swr/rast: Start to remove hardcoded clipcull_dist vertex attrib slotTim Rowley2017-09-133-8/+15
* swr/rast: Move clip/cull enables in APITim Rowley2017-09-139-40/+40
* swr/rast: Add new API SwrStallBETim Rowley2017-09-132-0/+17
* radeonsi: optimize TCS epilog when invocation 0 writes tess factorsMarek Olšák2017-09-114-28/+89
* radeonsi: implement pipe_context::fence_server_syncMarek Olšák2017-09-112-0/+52
* gallium/radeon: add a proper fail path for calloc in r600_flush_from_stMarek Olšák2017-09-111-3/+6
* radeonsi/gfx9: fix interprocess resource sharing on RavenMarek Olšák2017-09-111-1/+3
* r600: handle the non-TXF_LZ support path.Dave Airlie2017-09-111-1/+1
* gallium/u_blitter: use draw_rectangle for all blits except cubemapsMarek Olšák2017-09-112-4/+9
* gallium/u_blitter: use draw_rectangle callback for layered clearsMarek Olšák2017-09-114-8/+18
* gallium/u_blitter: add new union blitter_attrib to replace pipe_color_unionMarek Olšák2017-09-114-19/+19
* gallium/radeon: use rectangles for 1D and 2D texture blitsMarek Olšák2017-09-111-7/+13
* llvmpipe, draw: improve shader cache debuggingRoland Scheidegger2017-09-091-9/+16
* llvmpipe: enable PIPE_CAP_QUERY_PIPELINE_STATISTICSRoland Scheidegger2017-09-091-1/+1
* svga: abort shader translation upon indirect indexing of temporariesCharmaine Lee2017-09-081-0/+6
* r300: use ARRAY_SIZE macroEric Engestrom2017-09-081-1/+3
* radeonsi: move the guts of ARB_shader_group_vote emission to acConnor Abbott2017-09-081-21/+3
* radeonsi: move si_emit_ballot() to acConnor Abbott2017-09-081-32/+6
* radeonsi: move emit_optimization_barrier() to acConnor Abbott2017-09-081-43/+2
* radeonsi: move llvm_get_type_size() to acConnor Abbott2017-09-081-34/+9
* ac/surface: add radeon_surf::has_stencil for convenienceMarek Olšák2017-09-077-11/+11
* radeonsi: don't read tcs_out_lds_layout.patch_stride from an SGPRMarek Olšák2017-09-071-6/+14
* radeonsi: don't read tcs_out_lds_layout.vertex_size from an SGPRMarek Olšák2017-09-073-6/+20
* radeonsi/gfx9: don't read LS out vertex stride from an SGPR in monolithic HSMarek Olšák2017-09-072-1/+11
* radeonsi: don't read the LS output vertex stride from an SGPR in LSMarek Olšák2017-09-071-4/+21
* radeonsi: don't read the number of TCS out vertices from an SGPR in TCSMarek Olšák2017-09-071-2/+15
* radeonsi: don't always apply the PrimID instancing bug workaround on SIMarek Olšák2017-09-071-1/+1
* radeonsi: remove 2 callbacks from si_shader_contextMarek Olšák2017-09-073-17/+13
* llvmpipe, draw: increase shader cache limitsRoland Scheidegger2017-09-071-3/+1
* radeon/uvd: fix the assertion check for YUYV formatLeo Liu2017-09-061-3/+5
* swr/rast: FE/Clipper - unify SIMD8/16 functions using simdlib typesTim Rowley2017-09-063-1189/+446
* swr/rast: Remove use of C++14 template variableTim Rowley2017-09-062-6/+14
* swr/rast: SIMD16 FE remove templated immediates workaroundTim Rowley2017-09-061-90/+20
* swr/rast: SIMD16 PA - rename Assemble_simd16 to AssembleTim Rowley2017-09-063-31/+15
* swr/rast: FE/Binner - unify SIMD8/16 functions using simdlib typesTim Rowley2017-09-065-1739/+696
* swr/rast: Removed some trailing whitespace caught during reviewTim Rowley2017-09-063-10/+10
* swr: set caps for VB 4-byte alignmentTim Rowley2017-09-061-3/+6
* swr/rast: Allow gather of floats from fetch shader with 2-4GB offsetsTim Rowley2017-09-062-1/+7
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