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* radeonsi: use level mask for early out in si_blit_decompress_colorNicolai Hähnle2016-04-271-6/+8
* radeonsi: si_blit_decompress_depth is only used for stagingNicolai Hähnle2016-04-271-21/+5
* radeonsi: only decompress the required ZS planes from si_blitNicolai Hähnle2016-04-271-6/+7
* radeonsi: decompress Z & S planes in one passNicolai Hähnle2016-04-271-28/+73
* radeonsi: early out of si_blit_decompress_depth_in_place based on dirty maskNicolai Hähnle2016-04-271-6/+14
* radeonsi: use MIN2 instead of expanded ?: operatorNicolai Hähnle2016-04-271-3/+3
* radeonsi: fix brace styleNicolai Hähnle2016-04-271-2/+4
* swr: s/Elements/ARRAY_SIZE/Tim Rowley2016-04-273-7/+7
* radeonsi: emit s_waitcnt for shader memory barriers and volatileNicolai Hähnle2016-04-271-13/+23
* swr: [rasterizer] warning cleanupTim Rowley2016-04-279-74/+27
* swr: [rasterizer core] implement legacy depth bias enableTim Rowley2016-04-274-21/+25
* swr: [rasterizer jitter] support for dumping x86 asmTim Rowley2016-04-272-0/+50
* swr: [rasterizer core] more backend refactoringTim Rowley2016-04-278-963/+573
* swr: [rasterizer jitter] add mSimdInt1TyTim Rowley2016-04-272-0/+2
* swr: [rasterizer core] backend refactorTim Rowley2016-04-275-238/+633
* svga: use the SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS queryBrian Paul2016-04-271-0/+3
* nouveau: codegen: LOAD: Take src swizzle into accountHans de Goede2016-04-271-2/+6
* nouveau: codegen: LOAD: Do not call fetchSrc(1) if the address is immediateHans de Goede2016-04-271-2/+3
* nouveau: codegen: LOAD: Always use component 0 when getting the addressHans de Goede2016-04-271-1/+3
* r600g: fix and optimize tgsi_cmp when using ABS and NEG modifierPatrick Rudolph2016-04-271-1/+10
* softpipe: add support for compute shaders. (v2)Dave Airlie2016-04-278-3/+369
* tgsi: accept a starting PC value for exec machine.Dave Airlie2016-04-271-1/+1
* swr: autogenerate swr_context_llvm.hTim Rowley2016-04-266-128/+16
* gallium: Remove every double semi-colonJakob Sinclair2016-04-268-13/+13
* gallium/r600: removing double semi-colonsJakob Sinclair2016-04-261-1/+1
* radeonsi: add RW_BUFFERS only once in si_ce_needed_cs_spaceMarek Olšák2016-04-261-2/+2
* nvc0: expose GLSL version 420 on GK110Samuel Pitoiset2016-04-261-1/+1
* nvc0: enable ARB_shader_image_load_store on GK110Samuel Pitoiset2016-04-261-1/+1
* gk110/ir: add emission for VSHLSamuel Pitoiset2016-04-261-0/+58
* gk110/ir: add emission for OP_SUEAU, OP_SUBFM and OP_SUCLAMPSamuel Pitoiset2016-04-261-0/+87
* gk110/ir: add emission for OP_SULDB and OP_SUSTxSamuel Pitoiset2016-04-261-0/+155
* gk110/ir: add emission for OP_MADSPSamuel Pitoiset2016-04-261-0/+23
* gk110/ir: add emission for OP_PERMTSamuel Pitoiset2016-04-261-0/+12
* nvc0: expose GLSL version 420 on GK104Samuel Pitoiset2016-04-261-0/+2
* nvc0: enable ARB_shader_image_load_store on GK104Ilia Mirkin2016-04-261-0/+2
* nvc0: inform users that 3D images are not fully supportedSamuel Pitoiset2016-04-263-5/+10
* nvc0: reduce GL_MAX_3D_TEXTURE_SIZE to 2048 on Kepler+Samuel Pitoiset2016-04-261-1/+1
* nvc0/ir: check that the image format doesn't mismatchSamuel Pitoiset2016-04-263-2/+25
* nvc0/ir: prevent out of bounds when no images are boundSamuel Pitoiset2016-04-261-2/+19
* nvc0/ir: add indirect support for images on KeplerSamuel Pitoiset2016-04-261-12/+28
* nvc0/ir: fix 1D arrays images for KeplerSamuel Pitoiset2016-04-261-2/+9
* nvc0/ir: fix cube images for KeplerSamuel Pitoiset2016-04-261-5/+5
* nv50/ir: add support for SULDP -> SULDB conversionIlia Mirkin2016-04-265-45/+293
* nv50/ir: make use of OP_SUQ for surfaces querySamuel Pitoiset2016-04-264-11/+71
* nv50/ir: add OP_BUFQ for buffers querySamuel Pitoiset2016-04-266-7/+23
* nv50/ir: enable early fragment test with explicit user controlSamuel Pitoiset2016-04-261-0/+3
* nvc0/ir: fix constraints for OP_SUSTx on KeplerSamuel Pitoiset2016-04-261-1/+3
* nv50/ir: re-introduce TGSI lowering pass for imagesSamuel Pitoiset2016-04-261-3/+94
* nv50/ir: add support for TGSI image declarationsSamuel Pitoiset2016-04-261-1/+22
* nvc0: add missing glMemoryBarrier bitsSamuel Pitoiset2016-04-261-1/+8
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