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* radeon/uvd: get the target buffer pitch correct for different formatLeo Liu2017-08-211-2/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: update non-resident bindless descriptors if neededSamuel Pitoiset2017-08-211-30/+55
| | | | | | | | | | Only resident bindless descriptors are currently updated and re-uploaded, this makes sure that the non-resident ones are also updated. Signed-off-by: Samuel Pitoiset <[email protected]> Cc: "17.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove old_fence parameter from r600_gfx_write_event_eopMarek Olšák2017-08-185-12/+17
| | | | | | just use the new scratch buffer. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: prevent a GPU hang after a timestamp eventMarek Olšák2017-08-185-8/+44
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use CLEAR_STATE on SIMarek Olšák2017-08-184-10/+63
| | | | | | | | | This fixes random hangs with Unigine Valley. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102201 Fixes: 064550238ef0 ("radeonsi: use CLEAR_STATE to initialize some registers") Reviewed-by: Nicolai Hähnle <[email protected]>
* llvmpipe: enable PIPE_CAP_QUERY_SO_OVERFLOWRoland Scheidegger2017-08-172-1/+4
| | | | | | | | | The driver supported this since way before the GL spec for it existed. Just need to support both the per-stream and for all streams variants (which are identical due to only supporting 1 stream). Passes piglit arb_transform_feedback_overflow_query-basic. Reviewed-by: Jose Fonseca <[email protected]>
* softpipe: enable PIPE_CAP_QUERY_SO_OVERFLOWRoland Scheidegger2017-08-172-2/+8
| | | | | | | The driver was supposed to support this since way before the GL spec for it existed, albeit it was apparently broken, so fix and enable it. Reviewed-by: Jose Fonseca <[email protected]>
* nv50/ir: fix TXQ srcMaskIlia Mirkin2017-08-161-0/+2
| | | | | | | | src0.x is always read for the LOD, irrespective of which outputs are read. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv50/ir: fix srcMask computation for TG4 and TXFIlia Mirkin2017-08-161-0/+2
| | | | | | | | | | | This affects which inputs are marked as used. In a situation where only the texture instruction uses an input, it might have been ignored as unused due to input masks. Affects subtests of KHR-GL45.texture_cube_map_array.sampling Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* swr/rast: Fix invalid casting for calls to Interlocked* functionsTim Rowley2017-08-163-7/+7
| | | | | | CID: 1416243, 1416244, 1416255 CC: [email protected] Reviewed-by: Bruce Cherniak <[email protected]>
* radeon/vce: support all firmwares with major ver 53Boyuan Zhang2017-08-161-8/+10
| | | | | | | | The vce firmware interface should now be stable, all firmwares with major version equals to 53 are supported. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <christian.koenig at amd.com>
* a2xx: only update rasterizer settings when they're thereIlia Mirkin2017-08-151-1/+1
| | | | | | The rasterizer being empty can happen e.g. during clears Signed-off-by: Ilia Mirkin <[email protected]>
* a2xx: add logicop supportIlia Mirkin2017-08-151-5/+4
| | | | | | This passes both gl-1.0-logicop and gl-1.1-xor piglits. Signed-off-by: Ilia Mirkin <[email protected]>
* broadcom/vc4: Port NEON-code to ARM64Jonas Pfeil2017-08-151-0/+84
| | | | | | | | | | Changed all register and instruction names, works the same. v2: Rebase on build system changes (by anholt) v3: Fix build on clang (by anholt, reported by Rob) Signed-off-by: Jonas Pfeil <[email protected]> Tested-by: Rob Herring <[email protected]>
* broadcom/vc4: Build the vc4_tiling_lt_neon.c with -mfpu=neon on ARM.Eric Anholt2017-08-154-7/+24
| | | | | | | | | | | | | If you don't pass this, the compiler refuses to compile the assembly for pre-v7 CPUs. This also keeps us from building identical, non-NEON code on aarch64 and x86. Fixes: a373f77662c5 ("vc4: Use a wrapper file to set VC4_BUILD_NEON instead of CFLAGS.") v2: Fix Android build by just appending NEON_C_SOURCES when ARCH_ARM_HAVE_NEON. Tested-by: Rob Herring <[email protected]>
* radeonsi: disable CE by defaultMarek Olšák2017-08-153-8/+21
| | | | | | | | | It makes performance worse by a very small (hard to measure) amount. We've done extensive profiling of this feature internally. Cc: 17.1 17.2 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Christian König <[email protected]>
* radeonsi: initialise imported surface to 0.Dave Airlie2017-08-151-1/+1
| | | | | | | | | | | | For memobj imports we weren't setting the surface to 0, which meant sometimes we'd end up with tile_swizzle garbage, which would corrupt rendering. This seems to fix the image corruption on the imported memory objects in vrdashboard for me. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nv50/ir: clean up saturated values immediatelyIlia Mirkin2017-08-121-1/+6
| | | | | | | | | | | | Since we don't iterate to a fixed point, we can end up in situations where we have a SAT instruction + a long immediate. This is not legal. However since it's immediately computable, just run unary straight away to handle the situation. Fixes: 24a799ad35a82 ("nv50/ir: fix ConstantFolding with saturation") Reported-by: Tobias Klausmann <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: unlink values pre- and post-call to division functionIlia Mirkin2017-08-121-4/+3
| | | | | | | | | While technically correct, this can lead to e.g. getImmediate assuming that it can walk up the value chain. It could be fixed to not do this, but it seems easier and less error-prone to just not link the two values to save on one LValue object. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium/radeon: only pass shader-specific debug flags to the disk shader cacheMarek Olšák2017-08-111-1/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi/gfx9: fix the scissor bug workaroundMarek Olšák2017-08-111-3/+7
| | | | | | | | otherwise there is corruption in most apps. Fixes: 0fe0320 radeonsi: use optimal packet order when doing a pipeline sync Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: use the VI codepath for clamping ZMarek Olšák2017-08-112-12/+2
| | | | | | | | | This fixes corrupted shadows in Unigine Valley. The corruption disappeared when I stopped setting IMG_DATA_FORMAT_24_8 for depth. Cc: 17.2 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: fail shader compilation if libelf is replaced by an incompatible versionMarek Olšák2017-08-101-1/+4
| | | | | | | | | | | | UE4Editor has this issue. This commit prevents hangs (release build) or assertion failures (debug build). It doesn't fix the editor, but catastrophic scenarios are prevented. Cc: 17.1 17.2 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: fix ConstantFolding with saturationKarol Herbst2017-08-092-0/+9
| | | | | | | | | | | | | | | | | For mul(a, +-1) codegen can generate OP_MOV with a saturation flag set which is ignored at emission. The same can happen with add(a, 0), and others. Adding an assert for detecting more of such issues. Fixes wrongly rendered water in Hitman Absolution running under wine. Also a few shaders in Mad Max and Alien Isolation produce such MOVs. CC: <[email protected]> Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]> [imirkin: generalize the fix for other cases] Reviewed-by: Ilia Mirkin <[email protected]>
* radeonsi: drop two unused variables in create_function()Samuel Pitoiset2017-08-091-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix a compile failure due to disabled assertsMarek Olšák2017-08-071-1/+1
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* radeonsi: use optimal packet order when doing a pipeline syncMarek Olšák2017-08-071-34/+83
| | | | | | | | | | | | Process most new SET packets in parallel with previous draw calls, then flush caches and wait, start the draw, and do L2 prefetches last. This decreases the [CP busy / SPI busy] ratio (verified with GRBM perf counters). In other words, the time window when shaders are idle (between (the wait and the draw) is much shorter now. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose the number of decompress calls to the HUDMarek Olšák2017-08-074-7/+20
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename GPU-dma-busy -> GPU-cp-dma-busyMarek Olšák2017-08-074-8/+8
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename shader_userdata -> shader_pointers where appropriateMarek Olšák2017-08-075-20/+20
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: prefetch VBO descriptors after the first VGT shaderMarek Olšák2017-08-071-17/+63
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add a separate dirty mask for prefetchesMarek Olšák2017-08-076-16/+64
| | | | | | | | | | so that we don't rely on si_pm4_state_enabled_and_changed, allowing us to move prefetches after draw calls. v2: ckear the dirty mask after unbinding shaders Tested-by: Dieter Nützel <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: add and use si_pm4_state_enabled_and_changedMarek Olšák2017-08-073-17/+18
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: de-atomize L2 prefetchMarek Olšák2017-08-077-9/+11
| | | | | | | I'd like to be able to move the prefetch call site around. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: align all CE dumps to L2 cache line sizeMarek Olšák2017-08-071-8/+17
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove a tautology sctx->framebuffer.nr_samples >= 1Marek Olšák2017-08-071-2/+1
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: print all members of radeon_info with R600_DEBUG=infoMarek Olšák2017-08-071-2/+14
| | | | | | | also set max_alignment on amdgpu. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* etnaviv: Add support for R8_UNORM texturesWladimir J. van der Laan2017-08-061-1/+1
| | | | | | | | R8_UNORM textures can be emulated by means of L8 and a swizzle. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Philipp Zabel <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: Implement ICACHEWladimir J. van der Laan2017-08-066-18/+95
| | | | | | | | | | | | | | | This patch adds support for large shaders on GC3000. For example the "terrain" glmark benchmark with a large fragment shader will work after this. If the GPU supports ICACHE, shaders larger than the available state area will be uploaded to a bo of their own and instructed to be loaded from memory on demand. Small shaders will be uploaded in the usual way. This mimics the behavior of the blob. On GPUs that don't support ICACHE, this patch should make no difference. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: Unified uniforms supportWladimir J. van der Laan2017-08-063-4/+36
| | | | | | | | | | | | | | GC3000 has changed from a separate store for VS and PS uniforms to a single, unified one. There is backwards compatibilty functionalty, however this does not work correctly together with ICACHE. This patch adds explicit support, although in the simplest way possible: the PS/VS uniforms split is still fixed and hardcoded. It should make no difference on hardware that does not have unified uniform memory. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: Update headers from rnndbWladimir J. van der Laan2017-08-061-5/+9
| | | | | Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* radeonsi: enable support for EXT_memory_objectAndres Rodriguez2017-08-061-1/+1
| | | | | | | | | v2: fix an indentation error v3: don't enable for r600 Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: hook up device/driver UUID queriesAndres Rodriguez2017-08-061-0/+14
| | | | | | | v2: move from r600_common to radeonsi Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: introduce device/driver UUID queriesAndres Rodriguez2017-08-062-0/+49
| | | | | | | | | | v2: remove unnecessary returns v3 (Timothy Arceri): updated trace v4 (Timothy Arceri): actually dump the params in trace Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v2) Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: add basic memory object supportDave Airlie2017-08-062-0/+122
| | | | | | | | | v2: also consider gfx9 metadata v3: ref/unref memobj->buf v4: add refcount comment Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: factor out metadata importAndres Rodriguez2017-08-061-27/+36
| | | | | | | Plumbing for importing memobj backed textures. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: introduce memory objectDave Airlie2017-08-062-0/+109
| | | | | | | | | | v2: fix comment regarding fd ownership, define pipe_memory_object v3: remove stray return v4 (Timothy Arceri): update trace v5 (Timothy Arceri): actually dump the params in trace Reviewed-by: Marek Olšák <[email protected]> (v3) Reviewed-by: Samuel Pitoiset <[email protected]>
* android: radeonsi: add nir include pathsMauro Rossi2017-08-041-1/+2
| | | | | | | | | | | | | | Android build changes to avoid the following building error: target C: libmesa_pipe_radeonsi <= external/mesa/src/gallium/drivers/radeonsi/si_pipe.c ... In file included from external/mesa/src/gallium/drivers/radeonsi/si_pipe.c:38: external/mesa/src/compiler/nir/nir.h:48:10: fatal error: 'nir_opcodes.h' file not found ^ 1 error generated. Fixes: da62a31c5b "radeonsi: add nir include paths" Reviewed-by: Emil Velikov <[email protected]>
* radeonsi: set drirc compiler options before calling common screen initNicolai Hähnle2017-08-044-13/+14
| | | | | | | | Also, access the options directly, allowing us to get rid of the PIPE_SCREEN_xxx flags. Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Makefile.sources: include driinfo_radeonsi.hJuan A. Suarez Romero2017-08-041-0/+1
| | | | Reviewed-by: Emil Velikov <[email protected]>
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