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* vc4: use the new parent/child pools for transfersNicolai Hähnle2016-10-055-6/+11
* freedreno: use the new parent/child pools for transfersNicolai Hähnle2016-10-055-6/+12
* r300: use the new parent/child pools for transfers (v2)Nicolai Hähnle2016-10-055-7/+11
* gallium/radeon: use the new parent/child pools for transfersNicolai Hähnle2016-10-053-6/+11
* radeonsi: optionally run the LLVM IR verifier passNicolai Hähnle2016-10-045-9/+38
* gallium/radeon: fix argument type of llvm.{cttz,ctlz}.i32 intrinsicsNicolai Hähnle2016-10-041-2/+2
* gallium/radeon: unify the creation of basic blocksNicolai Hähnle2016-10-041-10/+24
* gallium/radeon: merge branch and loop flow control stacksNicolai Hähnle2016-10-042-82/+78
* gallium/radeon: simplify if/else/endif blocksNicolai Hähnle2016-10-042-25/+18
* gallium/radeon: label basic blocks by the corresponding TGSI pcNicolai Hähnle2016-10-041-0/+17
* gallium/radeon: cleanup and fix branch emitsNicolai Hähnle2016-10-041-37/+14
* winsys/radeon: add buffer_get_reloc_offsetNicolai Hähnle2016-10-043-2/+14
* radeonsi: don't declare LDS in PS when ds_bpermute is usedMarek Olšák2016-10-043-4/+7
* radeonsi: use DDX/DDY directly in si_llvm_emit_ddxy_interpMarek Olšák2016-10-041-49/+7
* radeonsi: simplify si_llvm_emit_ddxyMarek Olšák2016-10-041-51/+29
* radeonsi: don't call build_gep0 in si_llvm_emit_ddxy on VIMarek Olšák2016-10-041-5/+9
* radeonsi: use a helper function for BuildGEP(0, x)Marek Olšák2016-10-041-47/+35
* radeonsi: remove obsolete shader definitionsMarek Olšák2016-10-041-12/+4
* radeonsi: remove unnecessary #includesMarek Olšák2016-10-0411-23/+0
* radeonsi: clean up lucky #include dependenciesMarek Olšák2016-10-042-36/+35
* radeonsi: don't re-create shader PM4 states after scratch buffer updateMarek Olšák2016-10-043-15/+25
* gallium/radeon: move r600_common_context::texture_buffers to r600gMarek Olšák2016-10-046-9/+8
* radeonsi: don't set sampler buffer offsets in create_sampler_viewMarek Olšák2016-10-043-24/+22
* radeonsi: optimize si_invalidate_buffer based on bind_historyMarek Olšák2016-10-041-87/+100
* radeonsi: track buffer bind historyMarek Olšák2016-10-044-5/+23
* radeonsi: drop support for NULL sampler viewsMarek Olšák2016-10-042-12/+4
* radeonsi: separate IA_MULTI_VGT_PARAM and VGT_PRIMITIVE_TYPE emissionMarek Olšák2016-10-041-7/+10
* radeonsi: move VGT_LS_HS_CONFIG to derived tess_stateMarek Olšák2016-10-043-28/+14
* radeonsi: don't check PIPE_BARRIER_MAPPED_BUFFERMarek Olšák2016-10-041-4/+3
* radeonsi: parse SURFACE_SYNC correctly on CIK-VIMarek Olšák2016-10-041-9/+16
* gallium/radeon: inline r600_context_add_resource_sizeMarek Olšák2016-10-042-21/+13
* radeonsi: Fix primitive restart when index changesJames Legg2016-10-041-7/+7
* swr: Removed stalling SwrWaitForIdle from queries.Bruce Cherniak2016-10-034-119/+87
* swr: [rasterizer core] refactor thread creationTim Rowley2016-10-033-9/+29
* swr: [rasterizer jitter] canonicalize blend compile stateTim Rowley2016-10-032-0/+39
* swr: [rasterizer core] archrast fixesTim Rowley2016-10-034-7/+14
* swr: [rasterizer jitter] fixes for icc in vs2015 compat modeTim Rowley2016-10-0312-1404/+1439
* swr: [rasterizer core] generalize compute dispatch mechanismTim Rowley2016-10-033-4/+15
* swr: [rasterizer common] os.h portability header changesTim Rowley2016-10-031-0/+6
* gallium/radeon: fix crash/regression in performance countersNicolai Hähnle2016-09-301-0/+9
* gallium/radeon: update documentation of buffer_get_virtual_addressNicolai Hähnle2016-09-301-0/+3
* gallium/radeon: emit relocations for query fencesNicolai Hähnle2016-09-304-9/+15
* radeon/uvd: adjust the buffer offset when relocation is usedNicolai Hähnle2016-09-301-0/+1
* radeon/vce: adjust the buffer offset when relocation is usedNicolai Hähnle2016-09-301-0/+1
* radeon/video: don't use sub-allocated buffersNicolai Hähnle2016-09-302-1/+10
* nv50/ir: teach insnCanLoad() about SHLADDSamuel Pitoiset2016-09-291-0/+2
* nv50/ir: optimize SHLADD(a, b, c) to MOV((a << b) + c)Samuel Pitoiset2016-09-291-0/+3
* nv50/ir: optimize SHLADD(a, b, 0x0) to SHL(a, b)Samuel Pitoiset2016-09-291-0/+8
* nv50/ir: optimize IMAD to SHLADD in presence of power of 2Samuel Pitoiset2016-09-291-0/+7
* nvc0/ir: add emission for SHLADDSamuel Pitoiset2016-09-293-0/+127
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