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* r600g,radeonsi: don't skip the context flush if a fence should be returnedMarek Olšák2014-04-182-2/+2
| | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77589
* svga: fix comment for emit_adjusted_vertex_attribs()Brian Paul2014-04-171-3/+3
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* svga: compute need_swvfetch in svga_create_vertex_elements_state()Brian Paul2014-04-173-13/+9
| | | | | | This saves us doing it at state validation time. Reviewed-by: Matthew McClure <[email protected]>
* svga: add VS code to set attribute W component to 1Brian Paul2014-04-175-46/+100
| | | | | | | | | | | | | | | There's a few 3-component vertex attribute formats that have no equivalent SVGA3D_DECLTYPE_x format. Previously, we had to use the swtnl code to handle them. This patch lets us use hwtnl for more vertex attribute types by fetching 3-component attributes as 4-component attributes and explicitly setting the W component to 1. This lets us handle PIPE_FORMAT_R16G16B16_SNORM/UNORM and PIPE_FORMAT_R8G8B8_UNORM vertex attribs without using the swtnl path. Fixes piglit normal3b3s GL_SHORT test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: implement support for signed byte vertex attributesBrian Paul2014-04-176-14/+151
| | | | | | | | | | | | | | There's no SVGA3D_DECLTYPE that directly corresponds to PIPE_FORMAT_R8G8B8_SNORM. Previously, we used the swtnl fallback path to handle this but that's slow and causes invariance issues. Now we fetch the attribute as SVGA3D_DECLTYPE_UBYTE4N and insert some extra VS instructions to remap the attributes from the range [0,1] to the range[-1,1]. Fixes Sauerbraten sw fallback. Fixes piglit normal3b3s-invariance test. Reviewed-by: Charmaine Lee <[email protected]>
* svga: move translated vertex declaration types into svga_velems_stateBrian Paul2014-04-174-40/+45
| | | | | | | Now only translate the formats once in svga_create_vertex_elements_state(). And rename the array and use the proper SVGA3dDeclType type. Reviewed-by: Charmaine Lee <[email protected]>
* Revert "svga: add work-around for Sauerbraten Z fighting issue"Brian Paul2014-04-173-49/+2
| | | | | | | | | | | | This reverts commit c875d6e57a817bb6a8163a8a98ebd2768ee91848. Conflicts: src/gallium/drivers/svga/svga_context.c This work-around will no longer be needed after the next patch which properly supports signed-byte vertex attributes. Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_setp() helper functionBrian Paul2014-04-172-12/+26
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: use new inst_token_predicated() helper functionBrian Paul2014-04-172-13/+25
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* radeonsi: Added Diag Handler to receive LLVM Error messagesDarren Powell2014-04-173-9/+55
| | | | Reviewed-by: Tom Stellard <[email protected]>
* nouveau/vdec: small fixes to h264 handlingMaarten Lankhorst2014-04-174-24/+24
| | | | | | | | | | | nouveau_vp3_inter_sizes requires sliec_count as argument just as the other places that call it from h264 code do. Hopefully fixes something. Fix the status_vp code to allow status == 0 too, when processing hasn't started yet. set h264->second_field correctly.
* r600g: Disable LLVM by default at runtime for graphicsMichel Dänzer2014-04-173-5/+5
| | | | | | | | | | | | | | | | | For graphics, the LLVM compiler backend currently has many shortcomings compared to the non-LLVM one. E.g. it can't handle geometry shaders yet, but that's just the tip of the iceberg. So building Mesa with --enable-r600-llvm-compiler is currently not recommended for anyone who doesn't want to work on fixing those issues. However, for protection of users who end up enabling it anyway for some reason, let's disable the LLVM backend at runtime by default. It can be enabled with the environment variable R600_DEBUG=llvm. Cc: "10.1" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g,radeonsi: share some of gfx flush codeMarek Olšák2014-04-164-82/+55
| | | | Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: share r600_flush_from_stMarek Olšák2014-04-163-34/+17
| | | | Reviewed-by: Christian König <[email protected]>
* r600g: merge r600_flush with r600_context_flushMarek Olšák2014-04-163-45/+33
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: merge si_flush with si_context_flushMarek Olšák2014-04-164-38/+33
| | | | | | This also removes si_flush_gfx_ring. Reviewed-by: Christian König <[email protected]>
* gallium/radeon: create and return a fence in the flush functionMarek Olšák2014-04-1616-63/+63
| | | | | | All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <[email protected]>
* r600g: remove redundant r600_flush_dma_from_winsysMarek Olšák2014-04-161-8/+1
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák2014-04-166-16/+14
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: cleanup redundant computation of flush flags and rename a functionMarek Olšák2014-04-161-8/+9
| | | | Reviewed-by: Christian König <[email protected]>
* r600g: remove redundant r600_flush_from_winsysMarek Olšák2014-04-161-8/+1
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: remove cs_write_reloc, add simpler cs_get_relocMarek Olšák2014-04-162-3/+4
| | | | | | | The only difference is that it doesn't write to the CS and only returns the index. Reviewed-by: Christian König <[email protected]>
* r600g/radeonsi: Map transfer staging texture unsynchronized when possibleMichel Dänzer2014-04-161-0/+2
| | | | | | | | | The transfer staging texture is always freshly allocated, so for write-only transfers we don't need to explicitly wait for the BO to become idle. Squeezes a few hundered MB/s more out of x11perf -shmput500 with glamor. Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: Use caching buffer manager for textures as wellMichel Dänzer2014-04-151-1/+1
| | | | | | | Significantly reduces BO allocation / destruction overhead for transfers, e.g. measurable via x11perf -shm{ge,pu}t* with glamor. Reviewed-by: Marek Olšák <[email protected]>
* ilo: remove GPE state size estimationChia-I Wu2014-04-147-326/+97
| | | | Use size defines from genhw.
* ilo: remove GPE command size estimationChia-I Wu2014-04-146-403/+87
| | | | Use size defines from genhw.
* ilo: remove unused headersChia-I Wu2014-04-143-566/+0
| | | | | Remove intel_*.h. brw_*.h is still needed by the state dumper and disassembler.
* ilo: use only defines from genhw headersChia-I Wu2014-04-147-106/+87
| | | | Stop including classic driver headers in genhw.h, with some formatting fixes.
* ilo: scripted conversion to genhw headersChia-I Wu2014-04-1425-1626/+1626
| | | | Hopefully my four hundred line sed script is correct.
* ilo: add genhw headersChia-I Wu2014-04-1422-131/+3504
| | | | | All except genhw.h are generated by https://github.com/olvaffe/envytools/. intel_chipset.h is deprecated.
* ilo: avoid brw_wm_barycentric_interp_mode in compilerChia-I Wu2014-04-141-17/+46
| | | | In preparation for genhw.
* ilo: add TOY_OPCODE_DOChia-I Wu2014-04-146-7/+10
| | | | | We used to give BRW_OPCODE_DO a special meaning, while we should have used TOY_OPCODE_DO.
* softpipe: fix shadow samplingHeinrich Janzing2014-04-111-68/+51
| | | | | | | | And remove nonsensical approximation of linear interpolation behavior for shadow samplers. Reviewed-by: Brian Paul <[email protected]> Tested-by: Brian Paul <[email protected]>
* softpipe: add PIPE_CAP_MIN/MAX_TEXTURE_GATHER_OFFSET query casesBrian Paul2014-04-111-0/+3
| | | | | | To silence compiler warnings. Reviewed-by: Ilia Mirkin <[email protected]>
* radeon/vce: implement B-frame supportChristian König2014-04-112-22/+53
| | | | | Signed-off-by: Slava Grigorev <[email protected]> Signed-off-by: Christian König <[email protected]>
* radeon/vce: add proper CPB backtrackChristian König2014-04-113-23/+123
| | | | | | Remember what frames we encoded at which position. Signed-off-by: Christian König <[email protected]>
* vl: add interface for H264 B-frame encodingChristian König2014-04-111-5/+6
| | | | Signed-off-by: Christian König <[email protected]>
* radeon/vce: remove RVCE_NUM_CPB_EXTRA_FRAMESChristian König2014-04-113-4/+2
| | | | | | Doesn't seems to be needed any more. Signed-off-by: Christian König <[email protected]>
* gallium: add a way to query min/max texture gather offsetsIlia Mirkin2014-04-1011-0/+24
| | | | | | | | Defaults to providing the same offsets as MIN/MAX_TEXEL_OFFSET. For nvc0, the offset can be -32/31. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: fix a race condition between winsys_create and winsys_destroyMarek Olšák2014-04-103-3/+3
| | | | | | | | | This also hides the reference count from drivers. v2: update the reference count while the mutex is locked in winsys_create Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: Don't leak bytecode on shader compile failureMichel Dänzer2014-04-101-7/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868 Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* freedreno/a3xx: assert() -> debug_assert()Rob Clark2014-04-091-1/+1
| | | | | | | | | We hit this assert with some piglit tests. Which appears to be a bug outside of freedreno. Previously we were relying on assert() being redefined to debug_assert() so that we didn't crash in release builds. Somehow that stopped working. So just use debug_assert() directly. Signed-off-by: Rob Clark <[email protected]>
* svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()Brian Paul2014-04-091-2/+2
| | | | | | | | | | | | Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module for AA lines (when the device doesn't support that feature). We need to initialize this list before we setup the swtnl pieces. Found/fixed by Charmaine Lee. Cc: "10.0" <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* freedreno/a3xx/compiler: add CEILRob Clark2014-04-091-0/+1
| | | | | | fixes piglit glsl-fs-ceil Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: fix neg mov'sRob Clark2014-04-091-20/+1
| | | | | | | | | | | | | | | | | | | | create_mov() was fixed up to handle neg/abs properly for interal mov's, using absneg.f, but forgot to fix it for TGSI MOV's. The problem with using add.f to handle negated mov's is that we can only take a single const reg src. So: MOV TEMP[n], -CONST[m] would turn into: add.f Rdst, (neg)CONST[m], 0.0 which would not work. Anyways, just remove the extra code and always use create_mov() which DTRT. This fixes piglit vs-op-neg-int test. Signed-off-by: Rob Clark <[email protected]>
* radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIKMarek Olšák2014-04-091-5/+5
| | | | This depends on my kernel fix. Hyper-Z is still disabled by default.
* r600g,radeonsi: add a bunch of useful queries for the HUDMarek Olšák2014-04-093-1/+41
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* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-091-1/+1
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* gallium/radeon: fix warningsMarek Olšák2014-04-092-1/+2
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* freedreno/a3xx: deal with optimized tex instructionsRob Clark2014-04-087-25/+41
| | | | | | | | | | | | | | | Keep track of whether we actually have any sam instructions in the resulting shader, rather than using TGSI SAMP declarations. If the sam instruction is optimized out, because the result is not used, we don't want to emit texture state, etc. In fact emitting sampler state and/or setting PIXLODENABLE bit when there are no texture fetches seems to cause lockup. In theory this should never happen for a "normal" shader, unless the state tracker is wonky. But it is a very real possibility for binning pass shaders. Signed-off-by: Rob Clark <[email protected]>
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