summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Collapse)AuthorAgeFilesLines
* nvfx: reset nvfx->hw_zetaXavier Chantry2010-11-251-1/+3
| | | | | | | | | | | | If nvfx_framebuffer prepare and validate were called successively with fb->zsbuf not NULL and then NULL, nvfx->hw_zeta would contain garbage and this would cause failures in nvfx_framebuffer_relocate/OUT_RELOC(hw_zeta). This was triggered by piglit/texwrap 2D GL_DEPTH_COMPONENT24 and caused first a 'write to user buffer!!' error in libdrm and then worse things. Signed-off-by: Xavier Chantry <[email protected]> Signed-off-by: Francisco Jerez <[email protected]>
* nvfx: fb->nr_cbufs <= 1 on nv30Xavier Chantry2010-11-251-1/+1
| | | | | | | | 7e1bf946316ff99feaa3f2e85f70b45bd9a77ade changed PIPE_CAP_MAX_RENDER_TARGETS to 1 on nv30. Signed-off-by: Xavier Chantry <[email protected]> Signed-off-by: Francisco Jerez <[email protected]>
* r600g: Removed duplicated call to tgsi_split_literal_constant().Tilman Sauerbeck2010-11-231-4/+0
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Only compare active vertex elementsMathias Fröhlich2010-11-231-1/+2
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* llvmpipe: Remove unnecessary headers.Vinson Lee2010-11-221-2/+0
|
* r600g: add support for ontario APUsAlex Deucher2010-11-224-0/+26
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r300g: Avoid returning values in a static array, fixing a potential raceMathias Fröhlich2010-11-221-11/+21
| | | | | | | | (Marek: added the initializion of "vec" in the default statement) NOTE: This is a candidate for the 7.9 branch. Signed-off-by: Marek Olšák <[email protected]>
* r600g: fix additional EVENT_WRITE packetAlex Deucher2010-11-221-0/+9
| | | | Add explicit EVENT_TYPE field
* gallium: add PIPE_SHADER_CAP_SUBROUTINESMarek Olšák2010-11-227-0/+20
| | | | | | | | | | | This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers which don't support RET (i915g, r300g, r600g, svga). ir_to_mesa does not currently generate subroutines, but it's a matter of time till it's added. It would then break all the drivers which don't implement them, so this CAP makes sense. Signed-off-by: Marek Olšák <[email protected]>
* Merge branch 'lp-offset-twoside'Keith Whitwell2010-11-226-69/+306
|\
| * llvmpipe: twoside for specular color alsoKeith Whitwell2010-11-194-20/+42
| |
| * llvmpipe: fix up twoside after recent changesKeith Whitwell2010-11-191-8/+7
| | | | | | | | Fix my slot/attr confusion.
| * llvmpipe: fix such that offset/twoside function only does in-place modificationHui Qi Tay2010-11-191-155/+159
| |
| * llvmpipe: clean up polygon offset function in lp setup codeHui Qi Tay2010-11-151-44/+16
| |
| * llvmpipe: added llvm offset setup codeHui Qi Tay2010-11-044-46/+143
| |
| * llvmpipe: Moved draw pipeline twoside function to llvm setup codeHui Qi Tay2010-11-014-5/+103
| |
| * llvmpipe: turn off draw offset/twoside when we can handle itKeith Whitwell2010-10-221-27/+72
| |
* | r600g: pick correct color swap for A8 fbos.Dave Airlie2010-11-221-0/+1
| | | | | | | | | | | | This fixes fdo bug 31810. Signed-off-by: Dave Airlie <[email protected]>
* | i915g: kill RGBA/X formatsDaniel Vetter2010-11-211-4/+0
| | | | | | | | | | | | | | | | It's intel, so always little endian! Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* | i915g: add pineview pci idsDaniel Vetter2010-11-212-0/+10
| | | | | | | | | | | | Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* | i915g: s/hw_tiled/tilingDaniel Vetter2010-11-212-6/+7
| | | | | | | | | | | | | | | | | | | | More in line with other intel drivers. Change to use enum by Jakob Bornecrantz. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* | i915g: rip out ->sw_tiledDaniel Vetter2010-11-214-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It looks like this was meant to facilitate unfenced access to textures/ color/renderbuffers. It's totally incomplete and fundamentally broken on a few levels: - broken: The kernel needs to about every tiled bo to fix up bit17 swizzling on swap-in. - unflexible: fenced/unfenced relocs from execbuffer2 do the same, much simpler. - unneeded: with relaxed fencing tiled gem bos are as memory-efficient as this trick. Hence kill it. Reviewed-by: Jakob Bornecrantz <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Jakob Bornecrantz <[email protected]>
* | r300g: silence guard band cap errorsJoakim Sindholt2010-11-211-0/+7
| | | | | | | | | | | | Somebody should find out what these are. It can be found on Windows getting a D3DCAPS9 from IDirect3D9::GetCaps() and reading the GuardBand* values.
* | nvfx: only expose one rt on nv30Xavier Chantry2010-11-201-1/+1
| | | | | | | | We do not know how to use more, GL_ARB_draw_buffers is not exposed on blob.
* | r600g: Fix location for clip plane registersOwen W. Taylor2010-11-202-8/+8
| | | | | | | | | | | | | | | | The stride between the different clip plane registers was incorrect. https://bugs.freedesktop.org/show_bug.cgi?id=31788 agd5f: fix evergreen as well.
* | r300g: fix rendering with no vertex elementsMarek Olšák2010-11-204-5/+40
| | | | | | | | | | Fixes glsl-vs-point-size, although I meant to fix glsl-novertexdata. Since swrast fails glsl-novertexdata too, I guess it's a core issue.
* | r600g: use full range of VS resources for vertex samplersAlex Deucher2010-11-193-4/+2
| | | | | | | | | | Now that we have fetch shaders, the full range of VS resources can be used for sampling.
* | r600g: use meaningful defines for chiprevAlex Deucher2010-11-193-19/+24
| | | | | | | | Makes the code much clearer.
* | r600g: translate ARR instruction for evergreenAlex Deucher2010-11-191-4/+13
| | | | | | | | | | evergreen variant of: 9f7ec103e26c67cb077fd7d94d2fb68562b86c40
* | r600g: add fetch shader capabilitiesJerome Glisse2010-11-199-12/+92
| | | | | | | | | | | | | | | | Use fetch shader instead of having fetch instruction in the vertex shader. Allow to restrict shader update to a smaller part when vertex buffer input layout changes. Signed-off-by: Jerome Glisse <[email protected]>
* | gallium/noop: report GL 2.1Dave Airlie2010-11-181-5/+8
| | | | | | | | | | this should at least make app use the same paths as they would for a real driver.
* | r600g: fix buffer alignmentAlex Deucher2010-11-171-10/+35
| | | | | | | | This should fix the remaining buffer alignment issues in r600g.
* | gallium: Remove redundant sw and debug target helpersJakob Bornecrantz2010-11-174-118/+0
| |
* | r600g: code cleanup (indent, trailing space, empty line ...)Jerome Glisse2010-11-179-73/+70
| | | | | | | | Signed-off-by: Jerome Glisse <[email protected]>
* | r300g: print FS inputs uninitialized due to hardware limits to stderrMarek Olšák2010-11-171-7/+17
| |
* | r600g: Synchronize supported color formats between Evergreen and r600/r700.Henri Verbeet2010-11-171-1/+4
| |
* | r600g: Swizzle vertex data only once.Henri Verbeet2010-11-172-35/+4
| | | | | | | | | | Vertex data swizzles are already done in the vertex shader. Doing them twice breaks BGRA vertex arrays for example.
* | r300g: remove the hack with OPCODE_RETMarek Olšák2010-11-161-4/+1
| | | | | | | | | | | | | | | | RET was interpreted as END, which was wrong. Instead, if a shader contains RET in the main function, it will fail to compile with an error message from now on. The hack is from early days.
* | r600g: Add PIPE_FORMAT_L8A8_UNORM for Evergreen as well.Henri Verbeet2010-11-151-0/+2
| |
* | r600g: Evergreen has two extra frac_bits for the sampler LOD state.Henri Verbeet2010-11-151-3/+3
| | | | | | | | The (piglit) mipmap_limits test shows the issue very clearly.
* | gallium/noop: no operation gallium driverJerome Glisse2010-11-155-0/+861
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is a fake swdri driver that perform no operations beside allocation gallium structure and buffer for upper layer usage. It's purpose is to help profiling core mesa/gallium without having pipe driver overhead hidding hot spot of core code. scons file are likely inadequate i am unfamiliar with this build system. To use it simply rename is to swrast_dri.so and properly set LIBGL_DRIVERS_PATH env variable. Signed-off-by: Jerome Glisse <[email protected]>
* | r300g: return shader caps from Draw for SWTCL vertex shadersMarek Olšák2010-11-141-0/+6
| |
* | r300g: clean up redundancy in draw functionsMarek Olšák2010-11-141-57/+45
| |
* | r300g: fix texture border color for all texture formatsMarek Olšák2010-11-131-33/+31
| | | | | | | | | | | | | | This fixes 8 texwrap format tests. The code should handle arbitrary formats now and is cleaner. NOTE: This is a candidate for the 7.9 branch.
* | svga: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+13
| | | | | | | | | | As per the ps_3_0 and vs_3_0 documentation. The aL register in D3D9 is quite tricky to use, though.
* | r600g: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+5
| |
* | r300g: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+11
| | | | | | | | | | To match shader model 2.0 (it's impossible to fully implement ARL with shader model 3.0 relative addressing).
* | nvfx: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+11
| | | | | | | | To match shader model 2.0.
* | nv50: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+5
| |
* | i965g: fill out CAPs for indirect addressingMarek Olšák2010-11-121-0/+5
| |
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 05:18:27 +0000