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* broadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.Eric Anholt2018-03-212-0/+16
* radeonsi: fix a snprintf warning on gcc 7.3.0Marek Olšák2018-03-211-1/+1
* radeonsi/gfx9: print the swizzle mode for testdmaMarek Olšák2018-03-211-2/+16
* ac/surface: compute tile swizzle for GFX9Marek Olšák2018-03-211-0/+1
* broadcom/vc5: Don't skip job submit just because everything is scissored.Eric Anholt2018-03-212-10/+7
* broadcom/vc5: Handle sparsely populated SO target array.Eric Anholt2018-03-211-7/+14
* broadcom/vc5: Fix 3D miplevel limit to match other texture targets.Eric Anholt2018-03-211-2/+1
* broadcom/vc5: Clamp the instance divisor to 16 bits.Eric Anholt2018-03-211-1/+2
* radeon/vce: move feedback command inside of destroy functionLeo Liu2018-03-213-9/+12
* virgl: Implement seamless cube mapsStéphane Marchesin2018-03-212-1/+3
* st/radeonsi: enable uniform packing in NIR backendTimothy Arceri2018-03-201-1/+5
* gallium: add packed uniform CAPTimothy Arceri2018-03-2016-0/+16
* st/nir/radeonsi: move nir_lower_uniforms_to_ubo() to the state trackerTimothy Arceri2018-03-201-10/+0
* broadcom/vc5: Add support for register spilling.Eric Anholt2018-03-193-0/+30
* r600: consolidate PIPE_BIND_SHARED/SCANOUT handlingMarek Olšák2018-03-162-14/+4
* etnaviv: remove superfluous \n from DBG(..) callersChristian Gmeiner2018-03-164-6/+6
* sched.h needs to be imported on Darwin/OSX targets.Apple SWE2018-03-141-0/+4
* Add processor topology calculation implementation for Darwin/OSX targets.Apple SWE2018-03-141-1/+55
* nv50,nvc0: Support BGRX1010102 and RGBX1010102 for sampling.Mario Kleiner2018-03-141-0/+2
* Revert "Add processor topology calculation implementation for Darwin/OSX targ...Dylan Baker2018-03-141-55/+0
* Revert "sched.h needs to be imported on Darwin/OSX targets."Dylan Baker2018-03-141-4/+0
* sched.h needs to be imported on Darwin/OSX targets.Apple SWE2018-03-131-0/+4
* Add processor topology calculation implementation for Darwin/OSX targets.Apple SWE2018-03-131-0/+55
* r600: fix abs for op3 sourcesRoland Scheidegger2018-03-141-54/+56
* ac/nir: pass the nir variable through tcs loading.Dave Airlie2018-03-141-5/+4
* ac/nir: Use lower_vote_eq_to_ballot instead of ac_nir_lower_subgroupsJason Ekstrand2018-03-131-0/+1
* brodacom/vc4: Fix simulator since the perfmon change.Eric Anholt2018-03-131-0/+1
* r600: implement callstack workaround for evergreen.Dave Airlie2018-03-121-8/+31
* radeonsi: add a workaround for GFX9 hang with init_config alignmentMarek Olšák2018-03-091-1/+2
* broadcom/vc4: Add an accelerated path to turn raster R8/RG88 into tiled.Eric Anholt2018-03-093-0/+211
* broadcom/vc4: Allow binding non-zero constant buffers.Eric Anholt2018-03-095-5/+53
* broadcom: Remove our defines of DRM_FORMAT_MOD_INVALID.Eric Anholt2018-03-092-8/+0
* broadcom: Suppress compiler warnings about enum pipe_tex_filter.Eric Anholt2018-03-092-0/+2
* autotools: include all meson.build filesDylan Baker2018-03-091-0/+2
* swr/rast: Refactor memory gather operationsGeorge Kyriazis2018-03-092-6/+4
* swr/rast: Add KNOB_DISABLE_SPLIT_DRAWGeorge Kyriazis2018-03-092-8/+26
* swr/rast: Add VPOPCNTGeorge Kyriazis2018-03-092-0/+9
* swr/rast: Add tracking for stream out topologyGeorge Kyriazis2018-03-094-5/+8
* swr/rast: Add split draw and other state information to DrawInfoEvent.George Kyriazis2018-03-094-32/+22
* swr/rast: Refactor api and worker event handlers.George Kyriazis2018-03-092-35/+52
* swr/rast: Add support for generalized late and early z/stencil statsGeorge Kyriazis2018-03-092-0/+73
* swr/rast: Rasterized Subspans stats supportGeorge Kyriazis2018-03-094-0/+30
* swr/rast: Added commentGeorge Kyriazis2018-03-091-0/+1
* etnaviv: allow mixing different bit depths for color and depth surfacesLucas Stach2018-03-091-1/+1
* tegra: Initial supportThierry Reding2018-03-099-0/+2346
* nouveau: Add framebuffer modifier supportThierry Reding2018-03-096-5/+146
* nouveau/nvc0: Extract common tile mode macroThierry Reding2018-03-091-6/+9
* radeonsi: remove chip_class parameter from si_lower_nirMarek Olšák2018-03-084-10/+6
* radeonsi: expand constbuf 0 address correctly to fix Vega10 hangsMarek Olšák2018-03-081-4/+17
* radeonsi: align command buffer starting address to fix some Raven hangsMarek Olšák2018-03-081-2/+3
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