summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Expand)AuthorAgeFilesLines
* radeon/uvd: add session context buffer for polaris 10/11 v2Christian König2016-07-182-0/+21
* compiler: Rename INTERP_QUALIFIER_* to INTERP_MODE_*.Kenneth Graunke2016-07-174-6/+6
* virgl: drop pointless leftover init of virgl_transfer_inline_write.Dave Airlie2016-07-171-1/+0
* nv50: fix alphatest for non-blendable formatsIlia Mirkin2016-07-1614-11/+118
* gallium/u_queue: add optional cleanup callbackRob Clark2016-07-161-1/+2
* radeonsi: remove the DRAW_PREAMBLE packetNicolai Hähnle2016-07-163-12/+1
* vc4: Speed up glGenerateMipmaps by avoiding shadow baselevel.Eric Anholt2016-07-155-3/+23
* vc4: Drop VC4_DIRTY_TEXSTATE in favor of the per-stage flags.Eric Anholt2016-07-154-8/+4
* vc4: Remove dead dirty_samplers field.Eric Anholt2016-07-152-5/+0
* vc4: Turn on control flow support in the simulator environment.Eric Anholt2016-07-151-0/+4
* svga: avoid ubinding render targets that have already been unboundCharmaine Lee2016-07-151-1/+6
* svga: dump code for GenMips.Neha Bhende2016-07-151-0/+6
* svga: handle mismatched number of samplers, sampler viewsBrian Paul2016-07-151-5/+10
* nv50/ir: add missing string for SV_WORK_DIMSamuel Pitoiset2016-07-141-0/+1
* Revert "radeon/llvm: Use alloca instructions for larger arrays"Marek Olšák2016-07-142-149/+25
* r600,compute: Reserve vtx 3 for kernel argumentsJan Vesely2016-07-141-3/+7
* radeon/uvd: fail to create a decoder if RUVD_MSG_CREATE submission failsMarek Olšák2016-07-141-6/+9
* gallium/radeon: add a return value to cs_flushMarek Olšák2016-07-141-3/+5
* freedreno/a4xx: Fix sign compare warnings[email protected]2016-07-141-7/+7
* freedreno/a3xx: Fix sign compare warnings[email protected]2016-07-141-7/+7
* freedreno/a2xx: Fix sign compare warnings[email protected]2016-07-141-4/+4
* radeon/vce: handle newly added parametersBoyuan Zhang2016-07-141-13/+20
* vc4: Emit resets of the uniform stream at the starts of blocks.Eric Anholt2016-07-139-0/+167
* vc4: Add support for scheduling of branch instructions.Eric Anholt2016-07-132-17/+114
* vc4: Move the QPU instructions to schedule into each block.Eric Anholt2016-07-134-141/+180
* vc4: Disable vc4_opt_vpm in the presence of control flow.Eric Anholt2016-07-131-0/+5
* vc4: Convert vc4_opt_dead_code to work in the presence of control flow.Eric Anholt2016-07-131-18/+29
* vc4: Update copy propagation for control flow.Eric Anholt2016-07-131-62/+137
* radeonsi: report accurate SGPR and VGPR spillsMarek Olšák2016-07-132-5/+15
* radeonsi: add a workaround for a compute VGPR-usage LLVM bugMarek Olšák2016-07-131-0/+35
* radeonsi: use LLVMGetTypeKind to tell if an input is an array of descriptorsMarek Olšák2016-07-131-19/+11
* radeonsi: replace !tbaa with !invariant.loadMarek Olšák2016-07-131-12/+5
* radeonsi: set dereferenceable attribute on descriptor arraysMarek Olšák2016-07-131-4/+11
* radeonsi: clean up shader value metadata codeMarek Olšák2016-07-131-15/+19
* radeonsi: remove LLVMNoUnwindAttribute usesMarek Olšák2016-07-131-36/+31
* radeonsi: fix a typo in SI_PARAM_LINEAR_* handlingMarek Olšák2016-07-131-1/+1
* gallium/radeon: normalize the code styleMarek Olšák2016-07-132-338/+286
* radeonsi: just save buffer sizes instead of buffers while recording IBsMarek Olšák2016-07-133-8/+3
* Add c99_alloca.h include to fix compilation on CygwinJon Turney2016-07-131-0/+1
* radeonsi: silence Coverity warningNicolai Hähnle2016-07-132-0/+4
* vc4: Validate QPU uniform pointer updates.Eric Anholt2016-07-121-0/+22
* vc4: Add support for NIR loops and break/continue.Eric Anholt2016-07-122-3/+79
* vc4: Add support for emitting NIR IF nodes.Eric Anholt2016-07-121-1/+91
* vc4: Add support for storing to NIR registers in a non-SSA fashion.Eric Anholt2016-07-122-85/+144
* vc4: Add a flag in the screen to track control flow support.Eric Anholt2016-07-123-1/+14
* vc4: Define a QIR branch instructionEric Anholt2016-07-124-9/+61
* vc4: Add kernel support for branching in shader validation.Eric Anholt2016-07-123-17/+280
* vc4: Add a bitmap of branch targets in kernel validation.Eric Anholt2016-07-123-2/+133
* vc4: Track the current instruction into the validation_state.Eric Anholt2016-07-121-24/+30
* vc4: Add QPU support for generating BRANCH instructions.Eric Anholt2016-07-125-1/+85
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 04:04:53 +0000