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* gm107/ir: fix DMUL opcode encodingIlia Mirkin2015-02-201-3/+3
* gk110/ir: add emission of dadd/dmul/dmad opcodesIlia Mirkin2015-02-201-3/+77
* nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmaxIlia Mirkin2015-02-201-3/+63
* gallium/radeon: fix an uninitialized-variable warningMarek Olšák2015-02-201-1/+1
* gallium: add new double-related shader caps to all the gettersIlia Mirkin2015-02-205-0/+20
* svga: add missing _DROUND,DFRACEXP_DLDEXP_SUPPORTED switch casesBrian Paul2015-02-201-0/+2
* radeonsi: don't use SQC_CACHES to flush ICACHE and KCACHE on SIMarek Olšák2015-02-201-18/+11
* vc4: Keep an array of pointers to instructions defining the temps around.Eric Anholt2015-02-198-68/+67
* vc4: Move qir_uniform() and the constant-value versions to vc4_qir.c/h.Eric Anholt2015-02-193-45/+49
* vc4: Enforce one-uniform-per-instruction after optimization.Eric Anholt2015-02-196-50/+209
* vc4: Rename add_uniform() to qir_uniform().Eric Anholt2015-02-191-15/+15
* vc4: Shut up runtime warnings about new pipe caps.Eric Anholt2015-02-191-0/+2
* nv50: add PIPELINE_STATISTICS query support, based on nvc0Ilia Mirkin2015-02-192-2/+27
* svga: add missing :Ilia Mirkin2015-02-191-1/+1
* gallium: add shader cap for dldexp/dfracexp supportIlia Mirkin2015-02-194-0/+5
* gallium: add a cap to enable double rounding opcodesIlia Mirkin2015-02-194-0/+8
* freedreno: add missing PIPE_CAP_RESOURCE_FROM_USER_MEMORY to switchIlia Mirkin2015-02-191-0/+1
* freedreno/a3xx: add ARB_instanced_arrays supportIlia Mirkin2015-02-192-2/+3
* freedreno/a3xx: add support for vertexid and instanceid sysvalsIlia Mirkin2015-02-194-16/+119
* freedreno: pass number of instances to drawIlia Mirkin2015-02-198-18/+22
* freedreno/a3xx: add ETC2 decoding supportIlia Mirkin2015-02-192-4/+17
* llvmpipe,softpipe: only support ETC1, not the upcoming ETC2Ilia Mirkin2015-02-182-0/+8
* freedreno/a3xx: add hardware ETC1 supportIlia Mirkin2015-02-182-0/+4
* ilo: fix PCB alloc asserts on Gen7.5 GT3Chia-I Wu2015-02-181-1/+5
* ilo: fix compiler warningsChia-I Wu2015-02-183-8/+12
* Revert "radeon/llvm: enable unsafe math for graphics shaders"Michel Dänzer2015-02-181-4/+0
* r600g/sb: treat undefined values like constantsDave Airlie2015-02-181-2/+2
* i915g: Use the actual MIN instruction.Kenneth Graunke2015-02-171-15/+1
* radeonsi: fix a crash if a stencil ref state is set before a DSA stateMarek Olšák2015-02-171-4/+8
* r600g,radeonsi: implement GL_AMD_pinned_memoryMarek Olšák2015-02-175-4/+54
* gallium: add interface and state tracker support for GL_AMD_pinned_memoryMarek Olšák2015-02-1710-0/+10
* radeonsi: initialize TC_L2_dirty to false after buffer allocationMarek Olšák2015-02-171-0/+1
* radeonsi: small fix in SPI stateMarek Olšák2015-02-171-2/+4
* r600g,radeonsi: use fences to implement PIPE_QUERY_GPU_FINISHEDMarek Olšák2015-02-171-9/+13
* r600g,radeonsi: demote TIMESTAMP_DISJOINT query to be a software queryMarek Olšák2015-02-171-14/+13
* ilo: always set up BLEND_STATE on Gen8Chia-I Wu2015-02-171-7/+1
* ilo: fix alpha test on Gen8Chia-I Wu2015-02-171-5/+26
* ilo: fix some state pointer commands on Gen8Chia-I Wu2015-02-151-0/+20
* nvc0: allow holes in xfb target listsIlia Mirkin2015-02-142-4/+13
* nvc0: bail out of 2d blits with non-A8_UNORM alpha formatsIlia Mirkin2015-02-141-2/+5
* ilo: fix JIP/UIP on Gen8Chia-I Wu2015-02-142-9/+25
* ilo: do not set GEN6_THREADCTRL_SWITCHChia-I Wu2015-02-141-4/+0
* ilo: correct ISA UIP/JIP decoding for Gen8Chia-I Wu2015-02-141-18/+39
* ilo: prepare for 64-bit immediates decodingChia-I Wu2015-02-141-15/+31
* ilo: cleanup ISA DW1 decodingChia-I Wu2015-02-141-34/+55
* ilo: cleanup ISA DW0 decodingChia-I Wu2015-02-141-10/+16
* ilo: update some outdated gen checksChia-I Wu2015-02-141-4/+4
* ilo: fix rectlist length on Gen8Chia-I Wu2015-02-141-1/+1
* ilo: fix 3DSTATE_VF_TOPOLOGYChia-I Wu2015-02-141-2/+1
* os,llvmpipe: Set rasterizer thread names on Linux.Jose Fonseca2015-02-131-1/+7
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