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* radeonsi: don't use an indirect table for state atomsMarek Olšák2018-04-2714-172/+148
* radeonsi: rename r600_atom -> si_atomMarek Olšák2018-04-2710-76/+76
* radeonsi: remove r600_pipe_common.hMarek Olšák2018-04-2714-347/+302
* radeonsi/gfx9: workaround for INTERP with indirect indexingMarek Olšák2018-04-271-6/+13
* radeonsi: rewrite DCC format compatibility checking codeMarek Olšák2018-04-271-56/+42
* radeonsi: implement DCC fast clear swizzle constraints more accuratelyMarek Olšák2018-04-273-35/+65
* radeonsi: rename variables and document stuff around DCC fast clearMarek Olšák2018-04-271-41/+42
* radeonsi: fully enable 2x DCC MSAA for array and non-array texturesMarek Olšák2018-04-274-14/+20
* radeonsi: enable fast color clear for level 0 of mipmapped textures on <= VIMarek Olšák2018-04-272-9/+24
* swr/rast: No need to export GetSimdValidIndicesGfxGeorge Kyriazis2018-04-271-4/+0
* swr/rast: Small editorial changesGeorge Kyriazis2018-04-273-19/+17
* swr/rast: Use new processor detection mechanismGeorge Kyriazis2018-04-272-1/+51
* swr/rast: Output rasterizer dir to console since it's process specificGeorge Kyriazis2018-04-271-1/+4
* swr/rast: Add TranslateGfxAddress for shaderGeorge Kyriazis2018-04-273-3/+19
* swr/rast: jit PRINT improvements.George Kyriazis2018-04-271-2/+13
* swr/rast: Fix regressions.George Kyriazis2018-04-271-1/+1
* swr/rast: Cleanup old cruft.George Kyriazis2018-04-271-17/+3
* swr/rast: Package events.proto with core outputGeorge Kyriazis2018-04-272-2/+32
* swr/rast: Fix init in EventHandlerWorkerStatsGeorge Kyriazis2018-04-271-1/+4
* swr/rast: Fix return type of VCVTPS2PH.George Kyriazis2018-04-271-1/+1
* swr/rast: WIP Translation handlingGeorge Kyriazis2018-04-272-18/+26
* swr/rast: Use different handing for stream masksGeorge Kyriazis2018-04-275-6/+11
* swr/rast: Silence warningsGeorge Kyriazis2018-04-273-4/+2
* swr/rast: Add support for TexelMask evaluationGeorge Kyriazis2018-04-272-0/+44
* swr/rast: Internal core changeGeorge Kyriazis2018-04-271-0/+1
* swr/rast: Fix x86 lowering 64-bit float handlingGeorge Kyriazis2018-04-272-6/+56
* swr/rast: Add some SIMD_T utility functorsGeorge Kyriazis2018-04-271-0/+66
* swr/rast: Fix wrong type allocationGeorge Kyriazis2018-04-271-1/+1
* swr: touch generated files to update timestampGeorge Kyriazis2018-04-271-0/+11
* swr/rast: Fix byte offset for non-indexed drawsGeorge Kyriazis2018-04-271-3/+3
* etnaviv: remove not needed includesChristian Gmeiner2018-04-271-3/+0
* etnaviv: remove redundant includeChristian Gmeiner2018-04-271-2/+0
* broadcom/vc5: Add support for centroid varyings.Eric Anholt2018-04-264-4/+53
* broadcom/vc5: Add an assert about GFXH-1559.Eric Anholt2018-04-261-0/+9
* broadcom/vc5: Implement GFXH-1742 workaround (emit 2 dummy stores on 4.x).Eric Anholt2018-04-261-8/+27
* radeon/vcn: fix mpeg4 msg buffer settingsBoyuan Zhang2018-04-261-9/+9
* broadcom/vc5: Fix reloads of separate stencil buffers.Eric Anholt2018-04-251-4/+16
* broadcom/vc5: Fix cpp of MSAA surfaces on 4.x.Eric Anholt2018-04-252-3/+5
* broadcom/vc5: Implement stencil blits using RGBA.Eric Anholt2018-04-252-2/+83
* broadcom/vc5: Remove leftover vc4 MSAA lowering setup in the FS key.Eric Anholt2018-04-251-4/+1
* broadcom/vc5: Fix tile load/store of MSAA surfaces on 4.x.Eric Anholt2018-04-251-1/+11
* nvc0/ir: all short immediates are sign-extended, adjust LIMM testIlia Mirkin2018-04-243-19/+24
* gm107/ir/lib: fix sched in div u32 builtinKarol Herbst2018-04-242-4/+4
* broadcom/vc5: Set up internal_format for imported resources.Eric Anholt2018-04-241-0/+2
* broadcom/vc5: Assert that created BOs have offset != 0.Eric Anholt2018-04-241-0/+1
* broadcom/vc5: Don't allocate simulator BOs at offset 0.Eric Anholt2018-04-241-1/+5
* broadcom/vc5: Add sim support for the GET_BO_OFFSET ioctl.Eric Anholt2018-04-242-6/+21
* broadcom/vc5: Treat imports of DRM_FORMAT_MOD_INVALID BOs as linear.Eric Anholt2018-04-241-0/+1
* ac/radv/radeonsi: refactor harvest config register getters.Dave Airlie2018-04-241-105/+6
* ac/radv/radeonsi: refactor max simd waves into common code.Dave Airlie2018-04-241-11/+1
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