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* radeonsi: add load_image_desc()Samuel Pitoiset2017-04-011-21/+24
| | | | | | | | Similar to load_sampler_desc(). Same deal for bindless. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: rework the load_sampler_desc() helpersSamuel Pitoiset2017-04-011-16/+10
| | | | | | | | | | Will be more convenient for bindless because the 64bit handle is actually the base_ptr of the descriptor (ie. 'list' will be fetched from TGSI_FILE_CONSTANT/TGSI_FILE_TEMPORARY instead). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nv50/ir: also do PostRaLoadPropagation for FMAKarol Herbst2017-03-312-1/+2
| | | | | | | | | | | | | | | | | Helps Feral-ported games, due to their use of fma() shader-db changes: total instructions in shared programs : 3934925 -> 3934327 (-0.02%) total gprs used in shared programs : 481563 -> 481563 (0.00%) total local used in shared programs : 27469 -> 27469 (0.00%) total bytes used in shared programs : 36061888 -> 36056504 (-0.01%) local gpr inst bytes helped 0 0 228 228 hurt 0 0 0 0 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gm107/ir: add LIMM form of madKarol Herbst2017-03-312-11/+26
| | | | | | | | | | | v2: renamed commit reordered modifiers add assert(dst == src2) v3: reordered modifiers again v5: no rounding bit for limms Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add LIMM form of madKarol Herbst2017-03-312-18/+34
| | | | | | | | | | v2: renamed commit reordered modifiers add assert(dst == src2) v3: removed wrong neg mod emission Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: implement mad post ra folding for nvc0+Karol Herbst2017-03-311-4/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | changes for GpuTest /test=pixmark_piano /benchmark /no_scorebox /msaa=0 /benchmark_duration_ms=60000 /width=1024 /height=640: score: 1026 -> 1045 changes for shader-db: total instructions in shared programs : 3943335 -> 3934925 (-0.21%) total gprs used in shared programs : 481563 -> 481563 (0.00%) total local used in shared programs : 27469 -> 27469 (0.00%) total bytes used in shared programs : 36139384 -> 36061888 (-0.21%) local gpr inst bytes helped 0 0 3587 3587 hurt 0 0 0 0 v2: removed TODO reorderd to show changes without RA modification removed stale debugging print() call v3: remove predicate checks enable only for gf100 ISA Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: restructure and rename postraconstantfolding passKarol Herbst2017-03-311-58/+63
| | | | | | | | | | | we might want to add more folding passes here, so make it a bit more generic v2: leave the comment and reword commit message v4: rename it to PostRaLoadPropagation Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: also do ConstantFolding for FMAKarol Herbst2017-03-311-0/+1
| | | | | | | | | | | | | | | | | Helps mainly Feral-ported games, due to their use of fma() shader-db changes: total instructions in shared programs : 3941587 -> 3940749 (-0.02%) total gprs used in shared programs : 481511 -> 481460 (-0.01%) total local used in shared programs : 27469 -> 27481 (0.04%) total bytes used in shared programs : 36123344 -> 36115776 (-0.02%) local gpr inst bytes helped 2 48 243 243 hurt 2 3 32 32 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: disable support for LIMMs on MAD/FMAKarol Herbst2017-03-311-8/+2
| | | | | | | | | | | | | | | | | | | | | | I hit an assert in the emiter while toying around with optimizations, because ConstantFolding immediated a big int into a mad. There is special handling for FMA/MAD in insnCanLoad, which is broken. With this patch the special path should be not hit anymore. Anyway, the constraints for the LIMMS can't be guarenteed in SSA form and I have patches pending to use it via a post-SSA optimization pass. As a result, immediates get immediated for int mad/fmas as well. changes in shader-db: total instructions in shared programs : 3943335 -> 3941587 (-0.04%) total gprs used in shared programs : 481563 -> 481511 (-0.01%) total local used in shared programs : 27469 -> 27469 (0.00%) total bytes used in shared programs : 36139384 -> 36123344 (-0.04%) Signed-off-by: Karol Herbst <[email protected]> [imirkin: remove extra bit from insnCanLoad as well] Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: Add support for NV_fill_rectangle for the GM200+Lyude2017-03-314-2/+13
| | | | | | | | | | | | | | | | | This enables support for the GL_NV_fill_rectangle extension on the GM200+ for Desktop OpenGL. Signed-off-by: Lyude <[email protected]> Changes since v1: - Fix commit message - Add note to reldocs Changes since v2: - Remove unnessecary parens in nvc0_screen_get_param() - Fix sorting in release notes - Don't execute FILL_RECTANGLE method on pre-GM200+ GPUs Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: Add a cap to check if the driver supports fill_rectangleLyude2017-03-3115-0/+15
| | | | | | | | Changes since v1: - Add pipe caps for etnaviv, freedreno, swr and virgl Signed-off-by: Lyude <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: remove support for predicates from TGSI (v2)Marek Olšák2017-04-0115-43/+1
| | | | | | | | | | | Neved used. v2: gallivm: rename "pred" -> "exec_mask" etnaviv: remove the cap gallium: fix tgsi_instruction::Padding Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi/gfx9: allow CMASK fast clear with RB+Marek Olšák2017-03-311-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't compare src_va w/ dst_va for CP_DMA_CLEARMarek Olšák2017-03-311-1/+2
| | | | | | src_va contains the clear value in this case. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix 1D array fetches with derivs, bias, or Z compare valueMarek Olšák2017-03-311-1/+1
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix and enable single-sample CMASK fast clearMarek Olšák2017-03-311-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix and enable MSAA compressionMarek Olšák2017-03-312-5/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: disable CEMarek Olšák2017-03-311-1/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: fix linear mipmap CPU accessMarek Olšák2017-03-312-7/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add tests verifying that VM faults don't hangMarek Olšák2017-03-313-0/+43
| | | | | | GFX9 hangs instead of writing VM faults to dmesg. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: unify HS max_offchip_buffers workaroundsMarek Olšák2017-03-311-3/+3
| | | | | | Vulkan doesn't set more than 508. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: adjust checking for SC bug workaroundsMarek Olšák2017-03-313-4/+13
| | | | | | | no change in behavior, just making sure that no later chips will use the workarounds Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: decompress DCC in set_sampler_view instead of create_sampler_view (v2)Marek Olšák2017-03-313-6/+16
| | | | | | v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: decompress DCC in set_framebuffer_state instead of create_surface (v2)Marek Olšák2017-03-313-6/+49
| | | | | | | | for threaded gallium, which can't use pipe_context in create_surface v2: don't add a new decompress helper function Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement ARB_shader_group_voteNicolai Hähnle2017-03-312-1/+85
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: enable ARB_shader_clockNicolai Hähnle2017-03-311-1/+1
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: emit TGSI_OPCODE_CLOCKNicolai Hähnle2017-03-311-0/+21
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_CAP_TGSI CLOCKNicolai Hähnle2017-03-3115-0/+15
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r300: Fix indenting in r300_get_param()Lyude2017-03-301-3/+3
| | | | | | Signed-off-by: Lyude <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* vc4: Fix indenting in vc4_screen_get_param()Lyude2017-03-301-3/+3
| | | | | | Signed-off-by: Lyude <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* ddebug: implement clear_textureMarek Olšák2017-03-302-0/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix an unused-variable warning in a release buildMarek Olšák2017-03-301-3/+1
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* softpipe: fix a maybe-uninitialized warningMarek Olšák2017-03-301-1/+1
| | | | | | /home/marek/dev/mesa-main/src/gallium/drivers/softpipe/sp_compute.c:178: warning: 'grid_size' may be used uninitialized in this function [-Wmaybe-uninitialized]
* gallium/radeon: s/dcc_disable/disable_dcc/Marek Olšák2017-03-304-9/+9
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: handle incompatible DCC formats in resource_copy_regionMarek Olšák2017-03-301-0/+5
| | | | | | | Required because of later commits. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* radeonsi: remove a workaround for inexact *8_SNORM blitsMarek Olšák2017-03-301-3/+1
| | | | | | | | All tests pass on Fiji now. This prevents DCC disablement due to incompatible DCC formats due to the fallback. Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]>
* gallium/radeon: add and use a new helper vi_dcc_enabledMarek Olšák2017-03-305-14/+16
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium/radeon: formalize that r600_query_hw_add_result doesn't need a contextMarek Olšák2017-03-303-8/+9
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: don't make a copy of pipe_index_buffer in draw_vboMarek Olšák2017-03-301-32/+27
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radeon/uvd: set correct vega10 db pitch alignmentBoyuan Zhang2017-03-301-4/+12
| | | | | | | | Create new function to get correct alignment based on Asics, and change the corresponding decode message buffer and dpb buffer size calculations Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: add vce support for firmware 53.19.4Leo Liu2017-03-301-0/+6
| | | | | | | v2: squashed with other similar commits Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vce: adapt gfx9 surface to vceLeo Liu2017-03-302-15/+51
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/surface: add height pitch for gfx9Leo Liu2017-03-301-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]>
* radeon/uvd: clear message buffer when reuseLeo Liu2017-03-301-1/+2
| | | | | | | | As required by firmware Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: adapt gfx9 surface to uvdLeo Liu2017-03-306-56/+106
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: add uvd soc15 registerLeo Liu2017-03-302-4/+27
| | | | | | Signed-off-by: Leo Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi/gfx9: disable features that don't workMarek Olšák2017-03-304-5/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: only allow GL 3.1Marek Olšák2017-03-301-0/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: add linear address computations for texture transfersMarek Olšák2017-03-301-20/+53
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: don't generate LS and ES statesMarek Olšák2017-03-301-24/+46
| | | | | | these shaders don't exist on GFX9 Reviewed-by: Nicolai Hähnle <[email protected]>
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