summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Expand)AuthorAgeFilesLines
...
* r600/sb: update last_cf for finalize if.Dave Airlie2015-09-011-0/+3
* r600: move prim convert from geom shader to function.Dave Airlie2015-08-312-25/+26
* r600g: Use TGSI parse results instead of manually exfiltratingEdward O'Callaghan2015-08-301-1/+1
* r600g: Set geometry properties in r600_create_shader_state()Edward O'Callaghan2015-08-303-25/+23
* r600g: Move geometry properties state from shader to selectorEdward O'Callaghan2015-08-306-22/+23
* r600g: Remove dead assigment to 'gs_input_prim' in shader stateEdward O'Callaghan2015-08-302-4/+0
* radeonsi: don't use the emit qt keyword in si_init_atomMarek Olšák2015-08-291-2/+2
* radeonsi: remove no-op 32-bit maskingMarek Olšák2015-08-295-7/+7
* gallium/radeon: fix the ADDRESS_HI mask for EVENT_WRITE CIK packetsMarek Olšák2015-08-291-8/+8
* freedreno/a3xx: implement half-z clippingIlia Mirkin2015-08-293-2/+4
* freedreno/a3xx: add basic clip plane supportIlia Mirkin2015-08-293-1/+24
* nvc0: change prefix of MP performance counters to HW_SMSamuel Pitoiset2015-08-292-149/+149
* nvc0: sort performance counter queries by nameSamuel Pitoiset2015-08-292-142/+142
* nvc0: make names of performance counter queries consistentSamuel Pitoiset2015-08-292-56/+56
* nvc0: use enumerations for driver queriesSamuel Pitoiset2015-08-291-120/+123
* nvc0: remove commented out code related to PCOUNTER queriesSamuel Pitoiset2015-08-291-20/+0
* r600: port si_conv_prim_to_gs_out from radeonsiDave Airlie2015-08-291-15/+16
* r600g: use PRIi64 for some compute debug printfsDave Airlie2015-08-291-4/+4
* r600g/sb: Don't crash on empty if jump targetGlenn Kennard2015-08-281-1/+4
* r600g/sb: Don't read junk after EOPGlenn Kennard2015-08-283-1/+6
* r600g/sb: Handle undef in read port trackerGlenn Kennard2015-08-281-1/+1
* nir: Convert the builder to use the new NIR cursor API.Kenneth Graunke2015-08-273-5/+5
* nouveau: avoid build failures since 0fc21ecfIlia Mirkin2015-08-263-3/+3
* gallium/radeon: read_registers should return bool meaning success or failureMarek Olšák2015-08-262-3/+3
* radeonsi: add IB parser support for CP DMA packetsMarek Olšák2015-08-264-61/+122
* radeonsi: add IB tracing support for debug contextsMarek Olšák2015-08-265-16/+105
* radeonsi: remove old CS tracing codeMarek Olšák2015-08-265-47/+3
* radeonsi: parse and dump status registers on GPU hangMarek Olšák2015-08-261-0/+52
* radeonsi: add an IB parserMarek Olšák2015-08-261-0/+245
* radeonsi: save the contents of indirect buffers for debug contextsMarek Olšák2015-08-263-0/+15
* radeonsi: generate register and packet tables for an IB parser from sid.hMarek Olšák2015-08-264-0/+190
* radeonsi: remove duplicated register definitions and instruction definitionsMarek Olšák2015-08-261-3160/+0
* r600g,radeonsi: remove unused ill-formed register field definitionsMarek Olšák2015-08-262-2/+0
* radeonsi: add an initial dump_debug_state implementation dumping shadersMarek Olšák2015-08-264-0/+64
* radeonsi: allow si_dump_key to write to a fileMarek Olšák2015-08-262-18/+19
* gallium/ddebug: new pipe for hang detection and driver state dumping (v2)Marek Olšák2015-08-267-0/+2123
* gallium: add flags parameter to pipe_screen::context_createMarek Olšák2015-08-2630-37/+45
* radeonsi: mark unreachable paths to avoid warningsGrazvydas Ignotas2015-08-262-3/+3
* freedreno/ir3: fix compile break after splitting out nir_control_flow.hRob Clark2015-08-251-0/+1
* freedreno/ir3: fix compile break after fxn->start_block removalRob Clark2015-08-251-1/+1
* freedreno/a4xx: formats updateRob Clark2015-08-241-5/+5
* freedreno: update generated headersRob Clark2015-08-245-5/+8
* nv50: fix 2d engine blits for 64- and 128-bit formatsIlia Mirkin2015-08-231-0/+4
* nv50: account for the int RT0 rule for alpha-to-one/covIlia Mirkin2015-08-233-11/+23
* nv50,nvc0: disable depth bounds test on blitIlia Mirkin2015-08-232-0/+3
* r600g: Fix assert in tgsi_cmpGlenn Kennard2015-08-231-2/+2
* nouveau: add codegen/unordered_set.h to the tarballEmil Velikov2015-08-221-1/+2
* vc4: Actually allow math results to allocate into r4.Eric Anholt2015-08-212-1/+7
* vc4: Fold the 16-bit integer pack into the instructions generating it.Eric Anholt2015-08-215-30/+22
* vc4: Reuse QPU dumping for packing bits in QIR.Eric Anholt2015-08-213-22/+26