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* rbug: update data structures, functions for future changesBrian Paul2012-08-163-76/+71
| | | | | To support geom/compute/etc shaders, samplers, sampler views, etc. To support pipe->bind_sampler_states() w/ start_slot.
* gallium/trace: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-4/+14
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* gallium/identity: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-4/+12
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* galahad: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-41/+57
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* svga: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-24/+65
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* llvmpipe: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-22/+45
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* softpipe: add 'start' parameter to bind_sampler_states/views()Brian Paul2012-08-161-25/+49
| | | | | To support updating a sub-range of sampler states/views in the future. Note that we always pass start=0 at this time.
* gallium/trace: consolidate sampler, sampler_view codeBrian Paul2012-08-161-50/+82
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* gallium/identity: consolidate sampler, sampler_view codeBrian Paul2012-08-161-32/+54
| | | | This will simplify things when the pipe_context functions are consolidated.
* gallium: remove PIPE_MAX_VERTEX/GEOMETRY_SAMPLERS #defineBrian Paul2012-08-1615-36/+32
| | | | | | | | | | | | PIPE_MAX_SAMPLERS, PIPE_MAX_VERTEX_SAMPLERS and PIPE_MAX_GEOMETRY_SAMPLERS were all defined to the same value (16). In various places we're creating arrays such as sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS] so we were assuming the same number of max samplers for all shader stages anyway. Of course, drivers are still free to advertise different numbers of max samplers for different shaders.
* gallium: add a shader stage/type param to some draw functionsBrian Paul2012-08-163-18/+20
| | | | | To prepare for geometry shader texture support in the draw module. Note: we still only handle the vertex shader case.
* svga: move result->key expression after result != NULL checkBrian Paul2012-08-161-1/+3
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* svga: fix result==NULL logic in emit_fs_consts()Brian Paul2012-08-161-23/+25
| | | | | | | | The previous test for result != NULL was kind of bogus since we dereferenced the pointer earlier in the code. Now, check for result != NULL first, then get the result->key info. Also, remove the useless "offset +=" code at the end.
* svga: update comment (s/SVGA_NEW_VS_RESULT/SVGA_NEW_VS_PRESCALE/)Brian Paul2012-08-161-1/+1
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* svga: rename svga_hw_vs_parameters -> svga_hw_vs_constantsBrian Paul2012-08-163-6/+6
| | | | and similarly for svga_hw_fs_parameters
* radeonsi: Fix symbol conflicts with r600g.Michel Dänzer2012-08-1610-268/+254
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50389 Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Fix memory leaks if returning early from some state functions.Michel Dänzer2012-08-162-12/+14
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Fix LLVM context leak.Michel Dänzer2012-08-161-0/+1
| | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* llvmpipe: Silence Coverity incorrect sizeof expression defect.Vinson Lee2012-08-151-1/+1
| | | | | Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* radeon/llvm: Enable if-cvtVincent Lejeune2012-08-151-0/+3
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeon/llvm: Add callbacks needed by if-cvtVincent Lejeune2012-08-152-2/+151
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeon/llvm: Lower branch/branch_cond into predicated jumpVincent Lejeune2012-08-157-145/+278
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeon/llvm: Add a predicated JUMP instructionVincent Lejeune2012-08-151-0/+9
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeon/llvm: Support for predicate bitVincent Lejeune2012-08-158-13/+125
| | | | | | | Tom Stellard: - A few changes to predicate register defs Signed-off-by: Tom Stellard <[email protected]>
* r600g: Glue to handle predicate aware output from llvmVincent Lejeune2012-08-151-11/+22
| | | | Signed-off-by: Tom Stellard <[email protected]>
* r600g: Fix instruction group merge when there are predicated insts.Vincent Lejeune2012-08-151-0/+18
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeon/llvm: Do not use PV/PS if PRED_SEL does not matchVincent Lejeune2012-08-151-2/+4
| | | | Signed-off-by: Tom Stellard <[email protected]>
* r600g: Add support for predicatesVincent Lejeune2012-08-154-11/+18
| | | | Signed-off-by: Tom Stellard <[email protected]>
* radeonsi: move ps sampler state into PM4 streamChristian König2012-08-151-17/+7
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: move ps sampler views into PM4 streamChristian König2012-08-151-22/+7
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: move vertex state descriptors into PM4 streamChristian König2012-08-151-27/+9
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: add shader data infrastructureChristian König2012-08-153-2/+40
| | | | | | | | With this we can embed data for the shaders (like resource descriptors) into the PM4 stream. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/llvm: add support to fetch temps as vectorsChristian König2012-08-151-1/+11
| | | | | | | | Necessary for texture fetches with temp regs as source on SI. Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/llvm: Remove AMDGPUUtil.cppTom Stellard2012-08-158-81/+22
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* radeon/llvm: Cleanup AMDGPUUtil.cppApostolos Bartziokas2012-08-156-119/+95
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* radeon/llvm: Lower loads from USE_SGPR adddress space during DAG loweringTom Stellard2012-08-155-66/+50
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* radeon/llvm: Add live-in registers during DAG loweringTom Stellard2012-08-159-66/+82
| | | | | | Psuedo instructions emulating live-in registers have been removed and their corresponding intrinsics are now being lowered during DAG lowering.
* radeon/llvm: Lower store_output intrinsic during DAG loweringTom Stellard2012-08-153-22/+22
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* radeon/llvm: Force VTX_READ instructions to use same reg for src and dstTom Stellard2012-08-151-0/+14
| | | | | | I was seeing some GPU hangs that seemed to be cause by ALU instructions writing to the same register used as the source for VTX_READ. Adding this constraint to the VTX_READ instructions avoids this situation.
* radeonsi: fix build breakage after u_blitter changesMarek Olšák2012-08-151-3/+3
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* gallium/u_blitter: document custom meta helpersMarek Olšák2012-08-152-3/+3
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* r600g: disable handling of DISCARD_RANGEMarek Olšák2012-08-151-0/+2
| | | | https://bugs.freedesktop.org/show_bug.cgi?id=53130
* r600g: implement timestamp query and get_timestamp hookMarek Olšák2012-08-152-2/+28
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: enable MSAA on evergreen by defaultMarek Olšák2012-08-151-3/+24
| | | | v2: add the DRM version check
* r600g: implement copying between MSAA texturesMarek Olšák2012-08-151-4/+10
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* r600g: implement MSAA color resolveMarek Olšák2012-08-154-3/+108
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* r600g: implement MSAA depth-stencil decompression and resolveMarek Olšák2012-08-154-35/+140
| | | | and integer textures, which are resolved the same as depth, I think.
* r600g: implement TXQ_LZ opcodeMarek Olšák2012-08-151-7/+15
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* r600g: implement MSAA rendering and texturing for evergreen and caymanMarek Olšák2012-08-154-26/+232
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* r600g: implement set_sample_maskMarek Olšák2012-08-156-17/+61
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