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* freedreno/a6xx: Move inline functions out of fd6_draw.hKristian H. Kristensen2018-09-273-108/+110
* freedreno: fix a typo in launch_gridHyunjun Ko2018-09-271-1/+1
* freedreno/ir3: fix the param order of cmpxchgHyunjun Ko2018-09-271-2/+2
* freedreno/a6xx: fix shaders w/ >= 24 regsRob Clark2018-09-271-1/+1
* freedreno/a6xx: fix gl_FragCoord.wRob Clark2018-09-271-2/+6
* freedreno: handle invalidated buffers harderRob Clark2018-09-278-7/+39
* freedreno/a6xx: fix constlenRob Clark2018-09-271-7/+6
* freedreno: fix inorder rendering caseRob Clark2018-09-271-6/+7
* freedreno/a6xx: backface stencil stateRob Clark2018-09-272-2/+4
* freedreno/a6xx: fix gpu crash with separate-stencilRob Clark2018-09-271-1/+1
* freedreno/a6xx: fix MRT configRob Clark2018-09-271-7/+7
* freedreno: fix potential hang when destroying batchRob Clark2018-09-271-1/+1
* freedreno: fix corrupted fb stateRob Clark2018-09-272-2/+5
* freedreno: simplify pctx->clear()Rob Clark2018-09-276-74/+11
* freedreno: fix FD_MESA_DEBUG=flushRob Clark2018-09-272-2/+8
* freedreno: fix scissor state emitRob Clark2018-09-274-4/+8
* freedreno: update generated headersRob Clark2018-09-278-340/+1089
* radeonsi: NaN should pass kill_ifAxel Davy2018-09-251-1/+2
* radeon/uvd: use bitstream coded number for symbols of Huffman tablesLeo Liu2018-09-241-4/+14
* nv50/ir: fix link-time build failureRhys Perry2018-09-231-1/+1
* nvc0: fix bindless multisampled images on Maxwell+Rhys Perry2018-09-223-5/+45
* nvc0: warn about changing NVC0_CB_AUX_MP_INFO and NVC0_CB_AUX_DRAW_INFORhys Perry2018-09-221-2/+6
* nvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFORhys Perry2018-09-221-18/+18
* vc4: Remove dead i == 0 code from the cos() implementation.Eric Anholt2018-09-211-6/+3
* vc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.Eric Anholt2018-09-211-26/+40
* svga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutputCharmaine Lee2018-09-201-0/+9
* r300g: add PIPE_SHADER_CAP_SCALAR_ISA switch case to silence warningBrian Paul2018-09-201-0/+4
* svga: Enable Opengl 3.3 compatibility profileNeha Bhende2018-09-201-1/+1
* svga: Apply texcoord scale factors only if there is sampler viewNeha Bhende2018-09-201-1/+1
* svga: fix texture array layer index in transfer mapCharmaine Lee2018-09-202-66/+42
* Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"Timothy Arceri2018-09-182-44/+40
* v3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.Eric Anholt2018-09-171-6/+6
* v3d: Stop clearing the OQ state at the end of the job.Eric Anholt2018-09-173-18/+1
* v3d: Always emit a TF disable at the start of drawing on V3D 4.x.Eric Anholt2018-09-173-10/+8
* r600/sb: use safe math optimizations when TGSI contains precise operationsGert Wollny2018-09-153-1/+5
* virgl: adjust strides when mapping temp-resourcesErik Faye-Lund2018-09-141-0/+2
* nvir: Always split 64-bit IMAD/IMUL operationsPierre Moreau2018-09-131-1/+1
* nv50,nvc0: warn on not-explicitly-handled capsIlia Mirkin2018-09-112-14/+26
* radeonsi/nir: port some bindless and sampler code from TGSIMarek Olšák2018-09-101-30/+50
* radeonsi: split si_copy_bufferMarek Olšák2018-09-105-17/+33
* radeonsi: don't call VBO prefetch with size=0Marek Olšák2018-09-101-1/+1
* radeonsi: merge SI and CI dma_clear_buffer and remove the callbackMarek Olšák2018-09-108-90/+66
* radeonsi: fix GPU hangs with bindless textures and LLVM 7.0Marek Olšák2018-09-103-5/+33
* ac: use iN_0/1 constantsMarek Olšák2018-09-102-3/+3
* ac: add radeon_info::num_good_cu_per_shMarek Olšák2018-09-101-3/+1
* radeonsi: fix printing a BO list into ddebug reportsMarek Olšák2018-09-101-1/+2
* r600: fix HTILE for NPOT textures with mipmappingMarek Olšák2018-09-101-2/+2
* radeonsi: fix HTILE for NPOT textures with mipmapping on SI/CIMarek Olšák2018-09-101-2/+2
* svga: assorted fixes/changes in svga_pipe_blit.cBrian Paul2018-09-101-27/+15
* svga: set buffer bind_flags in svga_buffer_add_host_surface()Brian Paul2018-09-101-0/+3
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