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* radeonsi: make si_is_format_supported staticMarek Olšák2016-06-253-11/+6
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-254-15/+15
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-259-75/+75
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon/winsyses: boolean -> bool, TRUE -> true, FALSE -> falseMarek Olšák2016-06-251-21/+22
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use r600_resource_referenceMarek Olšák2016-06-2512-40/+32
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-255-36/+46
| | | | | | | | | | | | | | | | Empirical tests show that the polygon offset behaviour is entirely determined by the content of the PA_SU_POLY_OFFSET states, and not by the depth buffer format bound. PA_SU_POLY_OFFSET seems to directly set the parameters of the polygon offset formula, and setting 0 for PA_SU_POLY_OFFSET_DB_FMT_CNTL (ie setting the unorm depth bias behaviour with a scale of 2^0 = 1.0f) gives the unscaled behaviour. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Implement POLYGON_OFFSET_UNITS_UNSCALEDAxel Davy2016-06-252-15/+19
| | | | | | | | | | | | | | | | Empirical tests show that the polygon offset behaviour is entirely determined by the content of the PA_SU_POLY_OFFSET states, and not by the depth buffer format bound. PA_SU_POLY_OFFSET seems to directly set the parameters of the polygon offset formula, and setting 0 for PA_SU_POLY_OFFSET_DB_FMT_CNTL (ie setting the unorm depth bias behaviour with a scale of 2^0 = 1.0f) gives the unscaled behaviour. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon: Remove useless pa_su_poly_offset_db_fmt_cntlAxel Davy2016-06-251-1/+0
| | | | | | | | pa_su_poly_offset_db_fmt_cntl usages were removed in previous patches. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for evergreenAxel Davy2016-06-251-25/+13
| | | | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. v2: Increase the num_dw field for the poly offset atom Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset states for r600Axel Davy2016-06-251-24/+13
| | | | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with the other poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. v2: Increase the num_dw field for the poly offset atom Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset statesAxel Davy2016-06-251-23/+8
| | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with rasterizer poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add a cap for offset_units_unscaledAxel Davy2016-06-2515-0/+15
| | | | | | | | | | | | | | D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix fractional odd tessellation spacing for PolarisMarek Olšák2016-06-244-1/+23
| | | | | | | ported from Vulkan (and no source explains why this is needed) Cc: 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set some VGT context registers on SI-CIMarek Olšák2016-06-241-0/+3
| | | | | | the kernel sets them, but other UMDs can change them Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: optimize rendering to linear color buffersMarek Olšák2016-06-242-1/+12
| | | | | | loosely ported from Vulkan Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set almost optimal settings in SC_MODE_CNTL_1Marek Olšák2016-06-241-1/+10
| | | | | | ported from Vulkan Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: let drivers specify SC_MODE_CNTL_1 fieldsMarek Olšák2016-06-244-10/+18
| | | | | | radeonsi will set more fields Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: disable complicated point clipping against user clip planesMarek Olšák2016-06-243-3/+0
| | | | | | Nothing in the GL spec says that we should expand points to triangles. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a compute shader hang with big threadgroups on SI & CIMarek Olšák2016-06-241-0/+18
| | | | | | | ported from Vulkan Cc: 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nvc0: when mapping directly, provide accurate xfer info + startIlia Mirkin2016-06-241-5/+12
| | | | | | | | | | We were ignoring the incoming box parameters, and were providing totally bogus stride/layer stride, and other bits, for when a non-full-surface map was requested. Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Samuel Pitoiset <[email protected]> Cc: <[email protected]>
* radeonsi: drop the DRAW_PREAMBLE packet on PolarisNicolai Hähnle2016-06-242-1/+28
| | | | | | | | It will be removed from the firmware for the Polaris. Cc: 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use DRAW_(INDEX_)INDIRECT_MULTI on PolarisNicolai Hähnle2016-06-241-10/+36
| | | | | | | | The non-MULTI variants will be removed in Polaris firmware. Cc: 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: report a failure to parse dmesg instead of assertingNicolai Hähnle2016-06-241-1/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeon: check VM faults from DMA flushNicolai Hähnle2016-06-245-6/+68
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move gfx fence wait out of si_check_vm_faultsNicolai Hähnle2016-06-242-6/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: extract IB and bo list saving into separate functionsNicolai Hähnle2016-06-246-54/+88
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: set LLVM denormal flagsMarek Olšák2016-06-241-2/+5
| | | | | | | | | - make sure FP32 denormals will stay disabled in LLVM in the future (the current default is disabled) - tell LLVM that FP64 denormals are enabled Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit 1/sqrt for RSQMarek Olšák2016-06-241-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need the clamped version and we don't have to use any intrinsic. Stats on Tonga: 15382 shaders in 9128 tests Totals: SGPRS: 1230560 -> 1230560 (0.00 %) VGPRS: 469577 -> 462504 (-1.51 %) Code Size: 22089908 -> 21730052 (-1.63 %) bytes LDS: 598 -> 598 (0.00 %) blocks Scratch: 283648 -> 281600 (-0.72 %) bytes per wave Max Waves: 125664 -> 126969 (1.04 %) Wait states: 0 -> 0 (0.00 %) Totals from affected shaders: SGPRS: 547280 -> 547280 (0.00 %) VGPRS: 269132 -> 262059 (-2.63 %) Code Size: 15709604 -> 15349748 (-2.29 %) bytes LDS: 198 -> 198 (0.00 %) blocks Scratch: 74752 -> 72704 (-2.74 %) bytes per wave Max Waves: 47840 -> 49145 (2.73 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: Enable FMA on chips that support itJan Vesely2016-06-242-5/+7
| | | | | | | | | | v2: Merge with PIPE_SHADER_CAP_DOUBLES Add CHIP_HEMLOCK v3: only set the instruction on EG and CM Signed-off-by: Jan Vesely <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* Remove wrongly repeated words in commentsGiuseppe Bilotta2016-06-2315-17/+17
| | | | | | | | | | | | | | | | | Clean up misrepetitions ('if if', 'the the' etc) found throughout the comments. This has been done manually, after grepping case-insensitively for duplicate if, is, the, then, do, for, an, plus a few other typos corrected in fly-by v2: * proper commit message and non-joke title; * replace two 'as is' followed by 'is' to 'as-is'. v3: * 'a integer' => 'an integer' and similar (originally spotted by Jason Ekstrand, I fixed a few other similar ones while at it) Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* svga: update some comments in svga_buffer_handle()Brian Paul2016-06-231-10/+3
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: add a const qualifier in svga_buffer_upload_piecewise()Brian Paul2016-06-231-1/+1
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: minor code refactor for svga_buffer_upload_command()Brian Paul2016-06-231-5/+21
| | | | | | Put the HBS code into a separate function. Reviewed-by: Charmaine Lee <[email protected]>
* svga: minor code simplification in svga_context_finish()Brian Paul2016-06-231-1/+1
| | | | | | Signed-off-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* swr: [rasterizer core] fix dependency bugTim Rowley2016-06-234-10/+10
| | | | | | | Never be dependent on "draw 0", instead have a bool that makes the draw dependent on the previous draw or not dependent at all. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] use wrap-around safe compares for dependency checkingTim Rowley2016-06-236-36/+45
| | | | | | Move drawIDs from 64-bit to 32-bit to increase perf. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] add support for component packing for 'odd' formatsTim Rowley2016-06-231-4/+23
| | | | | | Add early-out if no components are enabled. Add asserts. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] track whether GS outputs viewport array indexTim Rowley2016-06-231-0/+3
| | | | | | So we can skip the index gather in PA. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] GS viewport array index attributeTim Rowley2016-06-232-1/+2
| | | | | | Only adds the attribute mapping to the jitter; no implementation yet. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] conservative rasterization frontend supportTim Rowley2016-06-2310-63/+325
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] stop single threaded crash exit crashTim Rowley2016-06-231-2/+3
| | | | | | | Function static destructors were getting called by exit handlers before context teardown. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] small fetch jit cleanupTim Rowley2016-06-231-134/+36
| | | | | | | | Handle SGV stores separate from the stream fetch code. Because of this change, there is a potential to jit an extra unused store. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] remove old commentTim Rowley2016-06-231-1/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] cleanup supporting different llvm versionsTim Rowley2016-06-238-34/+73
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] unitialized component fix in fetch jitTim Rowley2016-06-231-1/+1
| | | | | | | Was trying to store an extra uninitialized component. Only affects component packing, which isn't enabled (yet). Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] add support for building avx512 versionTim Rowley2016-06-235-15/+20
| | | | | | | Currently, most code paths between AVX2 and AVX512 are identical (see changes to knobs.h). Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] fix include for Intel compilerTim Rowley2016-06-231-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] workaround clang for windows __cpuid() bugTim Rowley2016-06-231-5/+9
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: push/pop DEBUG macro around llvm includesTim Rowley2016-06-232-4/+13
| | | | | | | | | | llvm redefines DEBUG; adding push/pop prevents a undefined reference to debug_refcnt_state in llvm-3.7+. v2: add undef DEBUG Cc: "12.0" <[email protected]> Reviewed-by: Bruce Cherniak <[email protected]>
* svga: rename svga_surface_copy() to svga_resource_copy_region()Brian Paul2016-06-231-9/+9
| | | | | | To be consistent with the pipe_context function name. Reviewed-by: Charmaine Lee <[email protected]>
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