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* Remove useless checks for NULL before freeingMatt Turner2014-12-089-30/+16
* vc4: Interleave register allocation from regfile A and B.Eric Anholt2014-12-081-39/+38
* vc4: Fix decision for whether the MIN operation writes to the B regfile.Eric Anholt2014-12-081-3/+3
* vc4: Drop dependency on r3 for color packing.Eric Anholt2014-12-081-4/+27
* vc4: Add support for GL 1.0 logic ops.Eric Anholt2014-12-081-2/+60
* vc4: Add support for TGSI_OPCODE_UCMP.Eric Anholt2014-12-081-0/+12
* radeonsi/compute: Clamp COMPUTE_TMPRING_SIZE.WAVES to: num_cu * 32Tom Stellard2014-12-081-0/+3
* winsys/radeon: Always report at least 1 compute unitTom Stellard2014-12-081-1/+1
* radeonsi: Program RASTER_CONFIG for harvested GPUs v5Tom Stellard2014-12-082-6/+130
* freedreno/a2xx: silence warning about missing DEPTH32XIlia Mirkin2014-12-061-1/+4
* freedreno/a3xx: handle index_bias (i.e. base_vertex)Ilia Mirkin2014-12-061-3/+13
* freedreno/a3xx: add bgr565 texturing and renderingIlia Mirkin2014-12-061-1/+1
* freedreno/a3xx: add support for SRGB render targetsIlia Mirkin2014-12-062-9/+12
* freedreno/a3xx: output RGBA16_FLOAT from fs for certain outputsIlia Mirkin2014-12-063-1/+17
* freedreno/a3xx: re-enable rgb10_a2 render targetsIlia Mirkin2014-12-061-1/+3
* freedreno/a3xx: fix border color swizzle to match texture format descIlia Mirkin2014-12-061-4/+18
* freedreno/a3xx: fix alpha-blending on RGBX formatsIlia Mirkin2014-12-063-8/+29
* llvmpipe: decrease MAX_SCENES from 2 to 1Roland Scheidegger2014-12-062-1/+13
* vc4: Try swapping the regfile A to B to pair instructions.Eric Anholt2014-12-051-2/+62
* vc4: Allow pairing of some instructions that disagree about the WS bit.Eric Anholt2014-12-051-1/+47
* vc4: Add separate write-after-read dependency tracking for pairing.Eric Anholt2014-12-051-20/+58
* vc4: Fix inverted priority of instructions for QPU scheduling.Eric Anholt2014-12-051-10/+10
* vc4: Refuse to merge two ops that both access shared functions.Eric Anholt2014-12-053-36/+55
* vc4: Allow dead code elimination of color reads.Eric Anholt2014-12-051-1/+1
* vc4: Add a debug flag for waiting for sync on submit.Eric Anholt2014-12-053-0/+11
* freedreno/a4xx: unify vertex/texture formats into a single tableRob Clark2014-12-041-299/+180
* freedreno/a4xx: fd4_util -> fd4_formatRob Clark2014-12-0415-15/+15
* freedreno: update generated headers / a4xx fmt renameRob Clark2014-12-046-124/+124
* freedreno/a4xx: frag-depth fixesRob Clark2014-12-032-18/+24
* freedreno/a3xx: implement anisotropic filteringIlia Mirkin2014-12-031-4/+6
* freedreno/a4xx: rect texturesRob Clark2014-12-031-3/+4
* freedreno: update generated headersRob Clark2014-12-035-11/+34
* freedreno: fix signed vs unsigned lolsRob Clark2014-12-031-1/+1
* r600, llvm: Don't leak global symbol offsetsJan Vesely2014-12-021-0/+1
* r600, llvm: Fix mem leakJan Vesely2014-12-021-0/+1
* vc4: Pair up QPU instructions when scheduling.Eric Anholt2014-12-013-38/+105
* r600g/sb: fix issues cause by GLSL switching to loops for switchDave Airlie2014-12-021-12/+38
* freedreno/a4xx: alpha blend fixesRob Clark2014-12-013-1/+11
* freedreno/a4xx: fix DRAW initiator encoding of index sizeRob Clark2014-12-011-8/+19
* freedreno: update generated headersRob Clark2014-12-015-23/+22
* svga: fix comment typoBrian Paul2014-12-011-1/+1
* vc4: Introduce scheduling of QPU instructions.Eric Anholt2014-12-016-126/+722
* vc4: Drop the explicit scoreboard wait.Eric Anholt2014-12-011-12/+11
* vc4: Also deal with VPM reads at thread end.Eric Anholt2014-12-011-2/+6
* vc4: Fix assertion about SFU versus texturing.Eric Anholt2014-12-011-3/+4
* vc4: Add another check for invalid TLB scoreboard handling.Eric Anholt2014-12-013-8/+39
* freedreno/a4xx: invalidate cache when vbo's changeRob Clark2014-12-011-0/+7
* freedreno/a3xx: add missing integer formats and enable renderingIlia Mirkin2014-11-301-3/+30
* freedreno/a3xx: enable sampling from integer texturesIlia Mirkin2014-11-305-5/+55
* freedreno: allow each generation to hook into sampler view settingIlia Mirkin2014-11-305-3/+8
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