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* i965/iris: perf-queries: don't invalidate/flush 3d pipelineLionel Landwerlin2019-12-131-12/+6
* v3d: actually root the first BO in a command list in the jobIago Toral Quiroga2019-12-131-1/+1
* etnaviv: drop compiled_rs_state forward declarationChristian Gmeiner2019-12-131-1/+0
* etnaviv: remove not used etna_bits_ones(..)Christian Gmeiner2019-12-131-6/+0
* swr: Fix build with llvm-10.0.Vinson Lee2019-12-121-0/+4
* panfrost: Query core count and thread tls allocAlyssa Rosenzweig2019-12-132-3/+32
* panfrost: Factor out panfrost_query_rawAlyssa Rosenzweig2019-12-131-3/+13
* panfrost: Split stack_shift nibble from unk0Alyssa Rosenzweig2019-12-121-1/+2
* panfrost: Rename unknown_address_0 -> scratchpadAlyssa Rosenzweig2019-12-121-1/+1
* panfrost: Don't lose bits!Tomeu Vizoso2019-12-121-4/+4
* panfrost: Hold a reference to sampler viewsTomeu Vizoso2019-12-121-3/+9
* gallium/swr: Fix Windows buildJan Zielinski2019-12-121-1/+4
* iris: Default to X-tiling for scanout buffers without modifiersKenneth Graunke2019-12-111-0/+2
* llvmpipe: enable ARB_shader_draw_parameters.Dave Airlie2019-12-121-1/+2
* nv50/ir: implement global atomics and handle it for nirKarol Herbst2019-12-112-4/+40
* gallivm: fix perspective enable if usage_mask doesn't have 0 bit setDave Airlie2019-12-121-2/+2
* llvmpipe/nir: handle texcoord requirementsDave Airlie2019-12-121-1/+1
* freedreno/a6xx: Convert some tile setup to OUT_REG()Kristian H. Kristensen2019-12-111-25/+15
* freedreno/a6xx: Convert gmem blits to OUT_REG()Kristian H. Kristensen2019-12-111-33/+13
* freedreno/a6xx: Convert VSC pipe setup to OUT_REG()Kristian H. Kristensen2019-12-111-16/+13
* freedreno/a6xx: Convert emit_zs() to OUT_REG()Kristian H. Kristensen2019-12-111-29/+24
* freedreno/a6xx: Convert emit_mrt() to OUT_REG()Kristian H. Kristensen2019-12-111-42/+37
* freedreno/a6xx: Include fd6_pack.h in a few filesKristian H. Kristensen2019-12-112-8/+10
* freedreno/a6xx: Drop stale includeKristian H. Kristensen2019-12-111-3/+0
* freedreno: New struct packing macrosKristian H. Kristensen2019-12-111-0/+109
* swr/rasterizer: Add tessellator implementation to the rasterizerJan Zielinski2019-12-115-35/+3326
* lima/ppir: enable lower_fdphErico Nunes2019-12-111-0/+1
* panfrost: Add PAN_MESA_DEBUG=syncTomeu Vizoso2019-12-115-6/+34
* iris: Create smaller program keys without legacy featuresKenneth Graunke2019-12-103-84/+183
* tu: Move UBWC layout into fdl6_layout() and use that function.Eric Anholt2019-12-111-1/+1
* freedreno: Move a6xx's setup_slices() to a shareable helper function.Eric Anholt2019-12-113-146/+19
* freedreno: Move UBWC layout into a slices array like the non-UBWC slices.Eric Anholt2019-12-115-9/+11
* freedreno: Refactor the UBWC flags registers emission.Eric Anholt2019-12-113-41/+34
* freedreno: Drop the extra offset field for mipmap slices.Eric Anholt2019-12-112-2/+7
* intel/decoder: Make get_state_size take a full 64-bit address and a baseKenneth Graunke2019-12-102-16/+12
* iris: INTEL performance query implementationDongwon Kim2019-12-105-0/+240
* iris: separating out common perf codeMark Janes2019-12-105-92/+157
* iris: Enable Gen11 Color/Z write merging optimizationKenneth Graunke2019-12-101-0/+8
* freedreno/a6xx: enable LRZ by defaultRob Clark2019-12-103-2/+4
* freedreno/a6xx: fix LRZ logicRob Clark2019-12-104-28/+49
* freedreno/a6xx: fix LRZ layoutRob Clark2019-12-101-7/+8
* freedreno/a5xx+a6xx: split LRZ layout to per-genRob Clark2019-12-104-45/+70
* freedreno/a6xx: disable LRZ when blendingRob Clark2019-12-103-2/+8
* radeonsi: don't rely on CLEAR_STATE to set PA_SC_GENERIC_SCISSOR_*Marek Olšák2019-12-101-3/+5
* radeonsi/gfx10: simplify the tess_turns_off_ngg conditionMarek Olšák2019-12-101-3/+1
* radeonsi/gfx10: disable vertex groupingMarek Olšák2019-12-102-6/+3
* radeonsi: enable NIR by default and document GL 4.6 supportMarek Olšák2019-12-101-1/+1
* meson: drop duplicate `lib` prefix on libiris_gen*Eric Engestrom2019-12-101-1/+1
* radeonsi: dcc dirty flagPierre-Eric Pelloux-Prayer2019-12-106-1/+26
* radeonsi: fix multi plane buffers creationPierre-Eric Pelloux-Prayer2019-12-101-2/+4
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