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* radeon/vcn: add header implementations for HEVCBoyuan Zhang2018-02-051-1/+347
* radeon/vcn: add ib implementations for HEVCBoyuan Zhang2018-02-051-45/+222
* radeon/vcn: support picture parameters for HEVCBoyuan Zhang2018-02-053-21/+64
* radeon/vcn: add vcn encode interface for HEVCBoyuan Zhang2018-02-051-2/+79
* broadcom/vc5: Ignore samplers for finding uniform offsets.Eric Anholt2018-02-051-1/+12
* broadcom/vc5: Fix non-mipfiltered sampling.Eric Anholt2018-02-051-1/+6
* r600: fix resq for buffer images.Dave Airlie2018-02-051-1/+4
* r600/eg: fix cube map array buffer images.Dave Airlie2018-02-051-1/+1
* broadcom/vc5: Enable UIF XOR on textures.Eric Anholt2018-02-023-7/+40
* broadcom/vc5: Fix alignment of miplevel 1 with UIF.Eric Anholt2018-02-023-15/+31
* broadcom/vc5: Switch our RGBA4 support to the new gallium format.Eric Anholt2018-02-021-2/+1
* gallium: Add a new A4B4G4R4 pipe format for Broadcom.Eric Anholt2018-02-021-0/+1
* meson/swr: Updated copyright datesGeorge Kyriazis2018-02-024-4/+4
* meson/swr: re-shuffle generated filesGeorge Kyriazis2018-02-024-80/+126
* amd: remove support for LLVM 3.9Marek Olšák2018-02-024-16/+5
* radeonsi: use pknorm_i16/u16 and pk_i16/u16 LLVM intrinsicsMarek Olšák2018-02-021-113/+39
* r600/eg: add crap indirect compute support.Dave Airlie2018-02-021-7/+19
* r600: don't do stack workarounds for hemlockRoland Scheidegger2018-02-021-0/+1
* r600: initial attempt at gl_HelperInvocation (v3)Dave Airlie2018-02-026-3/+108
* gallivm/llvmpipe: add const qualifiers on sampler variablesBrian Paul2018-02-011-1/+1
* svga: remove unneeded #includes in svga_pipe_draw.cBrian Paul2018-02-011-7/+0
* svga: whitespace/formatting fixes in svga_pipe_draw.cBrian Paul2018-02-011-33/+34
* svga: clean up retry_draw_range_elements(), retry_draw_arrays()Brian Paul2018-02-011-54/+27
* svga: remove unused min/max_index params to draw_vgpu10()Brian Paul2018-02-011-4/+3
* broadcom/vc5: Fix image_h setup for both loads and stores.Eric Anholt2018-02-011-3/+2
* broadcom/vc5: Add appropriate height padding for bank conflicts.Eric Anholt2018-02-014-0/+63
* broadcom/vc5: Simplify separate stencil surface setup.Eric Anholt2018-02-013-99/+77
* broadcom/vc5: Rename the UIFCFG register in the UAPI.Eric Anholt2018-02-012-2/+2
* broadcom/vc5: Skip over missing color buffers for a couple of checks.Eric Anholt2018-02-012-0/+6
* broadcom/vc5: Add the missing PIPE_CAP_FENCE_SIGNAL.Eric Anholt2018-02-011-0/+1
* radeonsi: use ac_build_buffer_load_format for image buffer loadsMarek Olšák2018-02-011-4/+10
* ac: add glc parameter to ac_build_buffer_load_formatMarek Olšák2018-02-012-2/+2
* radeonsi: load the right number of components for VS inputs and TBOsMarek Olšák2018-02-012-5/+16
* radeonsi: remove unused si_shader_context membersMarek Olšák2018-02-012-11/+0
* r600/eg: make sure we allow vpm bit on other CF ops.Dave Airlie2018-02-011-0/+1
* r600/sb: just add some missing debug bitsDave Airlie2018-02-011-0/+15
* r600: fix buffer resinfo opcode translation.Dave Airlie2018-02-012-2/+2
* svga: use opcode local var to simplify some codeBrian Paul2018-01-311-4/+2
* svga: s/unsigned/VGPU10_OPCODE_TYPE/Brian Paul2018-01-311-10/+11
* virgl: also remove dimension on indirect.Dave Airlie2018-01-311-1/+0
* radeonsi: remove DBG_PRECOMPILEMarek Olšák2018-01-313-51/+0
* radeonsi: print shader-db stats for main parts, not final binariesMarek Olšák2018-01-313-13/+23
* radeonsi: move max_simd_waves computation into a separate functionMarek Olšák2018-01-312-12/+23
* nir: add lower_all_io_to_temps flagTimothy Arceri2018-01-312-0/+2
* radeonsi/nir: add input support for arrays that have not been copied to temps...Timothy Arceri2018-01-311-67/+79
* ac/radeonsi: add lookup_interp_param and load_sample_position to the abiTimothy Arceri2018-01-311-0/+2
* radeonsi/nir: add prim_mask to the abiTimothy Arceri2018-01-311-3/+4
* radeonsi/nir: adjust load_sample_position() to be shared between backendsTimothy Arceri2018-01-311-2/+3
* radeonsi/nir: add si_nir_lookup_interp_param() helperTimothy Arceri2018-01-312-0/+40
* radeonsi/nir: move the interpolation qualifier scanningTimothy Arceri2018-01-311-16/+36