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* winsys/amdgpu: add winsys function cs_get_buffer_listMarek Olšák2015-10-031-0/+16
| | | | | | For debugging. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: stop using "reloc" in a few placesMarek Olšák2015-10-038-29/+28
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: tell the winsys the exact resource binding typesMarek Olšák2015-10-0322-122/+165
| | | | | | | Use the priority flags and expand them. This information will be used for debugging. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add an option for debugging VM faultsMarek Olšák2015-10-036-0/+124
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move dumping the last IB into its own functionMarek Olšák2015-10-031-23/+28
| | | | | | v2: indentation fix Reviewed-by: Michel Dänzer <[email protected]>
* ddebug: separate creation of debug filesMarek Olšák2015-10-033-28/+74
| | | | | | This will be used by radeonsi for logging. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/llvm: Initialize gallivm targets when initializing the AMDGPU target v2Tom Stellard2015-10-021-0/+2
| | | | | | | | | | | | | | This fixes a race condition in the glx-multithreaded-shader-compile test. v2: - Replace gallivm_init_llvm_{begin,end}() with gallivm_init_llvm_targets(). Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> Reviewed-by: Emil Velikov <[email protected]> CC: "10.6 11.0" <[email protected]>
* gallium/radeon: Use call_once() when initailizing LLVM targetsTom Stellard2015-10-021-13/+12
| | | | | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Mathias Fröhlich <[email protected]> Reviewed-by: Emil Velikov <[email protected]> CC: "10.6 11.0" <[email protected]>
* nouveau: wait to unref the transfer's bo until it's no longer usedIlia Mirkin2015-09-281-2/+3
| | | | | | | | | | The bo will often come from a slab in which case it doesn't matter. But for larger allocations this will be in its own bo, and we have to make sure to wait until it's no longer used in order for it to be freed. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Tested-by: Marcin Ślusarz <[email protected]>
* nouveau: delay deleting buffer with unflushed fenceIlia Mirkin2015-09-282-2/+10
| | | | | | | | | | | If there is an unflushed fence on the bo, then the resource may still be used in commands built up in the local pushbuf. Flushing can cause all sorts of unwanted effects, so just free the bo when the relevant fence is hit. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Tested-by: Marcin Ślusarz <[email protected]>
* nouveau: be more careful about freeing temporary transfer buffersIlia Mirkin2015-09-285-4/+30
| | | | | | | | | Deleting a buffer does not flush the command stream. Make sure that we wait for the copies to finish before deleting the temporary bo. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Tested-by: Marcin Ślusarz <[email protected]>
* radeonsi: add scratch buffer to the buffer list when it's re-allocatedMarek Olšák2015-09-261-0/+1
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
* radeon/vce: fix vui time_scale zero errorLeo Liu2015-09-251-0/+3
| | | | | | | | | if app pass 0 as frame_rate_num, it should not be encoded to the VUI. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: "10.6 11.0" <[email protected]>
* android: radeonsi: fix sid_tables.h missing LOCAL_MODULE_CLASSMauro Rossi2015-09-241-0/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon: remove the percentage symbol from HUD temperatureBenjamin Bellec2015-09-241-1/+1
| | | | | | | The HUD adds '%' if max == 100. Signed-off-by: Benjamin Bellec <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: handle dummy constant buffer allocation failureMarek Olšák2015-09-241-0/+2
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't forget to update scratch relocations for LS, HS, ES shadersMarek Olšák2015-09-241-2/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if updating the scratch buffer failsMarek Olšák2015-09-241-14/+49
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if PS fails to compile or uploadMarek Olšák2015-09-241-12/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or uploadMarek Olšák2015-09-241-7/+23
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle fixed-func TCS shader create failureMarek Olšák2015-09-241-2/+5
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle shader precompile failuresMarek Olšák2015-09-241-1/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if GS ring allocations failMarek Olšák2015-09-241-1/+10
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: skip drawing if the tess factor ring allocation failsMarek Olšák2015-09-243-5/+12
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add malloc fail paths to si_create_shader_stateMarek Olšák2015-09-241-0/+8
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: report alloc failure from si_shader_binary_readMarek Olšák2015-09-241-1/+4
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: add a fail path for depth MSAA texture readbackMarek Olšák2015-09-241-0/+5
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: handle buffer alloc failures in r600_draw_rectangleMarek Olšák2015-09-241-0/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: handle buffer_map staging buffer failures betterMarek Olšák2015-09-241-4/+3
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle constant buffer alloc failuresMarek Olšák2015-09-241-1/+7
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle index buffer alloc failuresMarek Olšák2015-09-241-0/+6
| | | | | | Cc: 11.0 <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: update num_dw in scissor_enable workaroundGrazvydas Ignotas2015-09-231-0/+1
| | | | | | | | | | "r600g: apply disable workaround on all scissors" forgot to update num_dw, fix it. Fixes: fbb423b433 "r600g: apply disable workaround on all scissors" Reported-and-tested-by: Markus Trippelsdorf <[email protected]> Signed-off-by: Grazvydas Ignotas <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: implement TXQS supportIlia Mirkin2015-09-212-25/+69
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Fredrik Bruhn <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: load fmask ptr relative to the resources arrayIlia Mirkin2015-09-211-1/+1
| | | | | | | | | | | res_ptr already contains the resource values. fmask_ptr needs to be looked up relative to the start of the resource params. Note that this only affects indirect loads of MS sampler arrays. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: "11.0" <[email protected]>
* freedreno/ir3: use nir two-sided-color loweringRob Clark2015-09-181-21/+3
| | | | | | | | With this, we completely switch over to nir lowering passes instead of tgsi_lowering. So one step closer to supporting direct glsl or spirv to nir support for freedreno a3xx/a4xx. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower txp/clamp in NIRRob Clark2015-09-181-26/+30
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add --gpu arg to cmdline compilerRob Clark2015-09-171-1/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: wire up ucp supportRob Clark2015-09-171-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add support for ucpRob Clark2015-09-174-13/+80
| | | | | | | | | Use nir_lower_clip pass for adding the VS/FS instructions to handle user-clip-planes and CLIPDIST. Wire up support for load_user_clip_plane intrinsic to fetch ucp[plane] values as driver-params (passed as const's to the shader). Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: convert from tgsi semantic/index to varying-slotRob Clark2015-09-177-193/+234
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: switch to shader_enums.h interp constantsRob Clark2015-09-174-41/+20
| | | | | | A small step towards un-TGSI'ifying ir3. Signed-off-by: Rob Clark <[email protected]>
* nv50,nvc0: flush texture cache in presence of coherent bufsIlia Mirkin2015-09-172-0/+39
| | | | | | | | This fixes the newly-added arb_texture_buffer_object-bufferstorage piglit test. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* nv50,nvc0: detect underlying resource changes and update ticIlia Mirkin2015-09-172-0/+43
| | | | | | | | | | | | | When updating texture buffers, we might end up replacing the whole buffer. Check that the tic address matches the resource address, and if not, update the tic and reupload it. This fixes: arb_direct_state_access-texture-buffer arb_texture_buffer_object-data-sync Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* vc4: Try to pair up instructions when only one of them has PM bitBoyan Ding2015-09-171-47/+76
| | | | | | | | | | | | | Instructions with difference in PM field can actually be paired up if the one without PM doesn't do packing/unpacking and non-NOP packing/unpacking operations from PM instruction aren't added to the other without PM. total instructions in shared programs: 48209 -> 47460 (-1.55%) instructions in affected programs: 11688 -> 10939 (-6.41%) Signed-off-by: Boyan Ding <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/a3xx: use NUM_USER_CLIP_PLANES helper instead of magic numberIlia Mirkin2015-09-161-1/+2
| | | | | | Use the helper from the newly-updated generated header file. Signed-off-by: Ilia Mirkin <[email protected]>
* freedreno/a3xx: fix blending of L8 formatIlia Mirkin2015-09-161-0/+2
| | | | | | | | Even though luminance formats don't have alpha, we still want the alpha output to go to the blender. This fixes the luminance blending tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.0" <[email protected]>
* freedreno/a3xx: add support for dual-source blendingIlia Mirkin2015-09-167-6/+32
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* vc4: convert from tgsi semantic/index to varying-slotEric Anholt2015-09-167-147/+106
| | | | | | | | | (originally part of previous patch, split out to separate patch by Rob) v2: squash in some fixes from Eric v3: Another fix from Eric for point coords. Signed-off-by: Rob Clark <[email protected]>
* gallium/ttn: Convert to using VARYING_SLOT_* / FRAG_RESULT_*.Eric Anholt2015-09-164-33/+66
| | | | | | | | | | | | | | | This avoids exceeding the size of the .index bitfield since it got truncated, and should make our NIR look more like the NIR that the rest of the NIR developers are working on. v2: split out vc4 updates, first patch uses varying_slot_to_tgsi_semantic() helper, and second patch does the actual conversion. v3: add frag_result_to_tgsi_semantic() helper and don't try to map frag_results to semantic name/index as if they were varying_slot's v4: use VERT_ATTRIB_ for VS inputs v5: Fix vc4 build. Signed-off-by: Rob Clark <[email protected]>
* nv50, nvc0: fix max texture buffer size to 128M elementsIlia Mirkin2015-09-162-2/+2
| | | | | | | | This is what the hardware supports, there never was any sort of 64K limit. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.6 11.0" <[email protected]>
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