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path: root/src/gallium/drivers
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* nv30: create uploader after pipe->screen is setIlia Mirkin2017-03-191-6/+6
* nv50,nvc0: enable TEX_LZ and TXF_LZIlia Mirkin2017-03-183-4/+17
* nvc0/ir: treat FMA like MAD for operand propagationKarol Herbst2017-03-181-0/+1
* gallium/radeon: formalize that create_batch_query doesn't need pipe_contextMarek Olšák2017-03-173-13/+12
* gallium/radeon: formalize that create_query doesn't need pipe_contextMarek Olšák2017-03-173-32/+32
* gallium/radeon: reference pipe_resource in pipe_transferMarek Olšák2017-03-172-2/+5
* radeonsi: compile all TGSI compute shaders asynchronouslyMarek Olšák2017-03-171-44/+81
* radeonsi: require that compiler threads are enabledMarek Olšák2017-03-172-11/+13
* trace: remove leftover assertions after pipe_resource wrapping removalMarek Olšák2017-03-171-6/+0
* swr: support layer output in geometry shadersIlia Mirkin2017-03-151-0/+2
* swr: validate backend state numAttributesTim Rowley2017-03-151-0/+2
* radeonsi: implement TGSI opcodes TEX_LZ and TXF_LZMarek Olšák2017-03-152-6/+16
* gallium: add PIPE_CAP_TGSI_TEX_TXF_LZMarek Olšák2017-03-1515-0/+15
* radeonsi: disable sinking common instructions down to the end blockSamuel Pitoiset2017-03-151-0/+11
* radeonsi: clean up tex_fetch_ptrs()Samuel Pitoiset2017-03-151-6/+4
* r600: refactor binding code for attach buffer to CB.Dave Airlie2017-03-151-33/+78
* r600: refactor out CB setup.Dave Airlie2017-03-151-104/+143
* r600: refactor texture resource words setup code.Dave Airlie2017-03-151-88/+131
* r600: factor out the code to initialise a buffer resource.Dave Airlie2017-03-151-29/+51
* r600g: make framebuffer atom rely on dual src blend state.Dave Airlie2017-03-154-2/+7
* nir: Rework conversion opcodesJason Ekstrand2017-03-144-17/+17
* gallium/radeon: disable the shader cache if dumping shadersMarek Olšák2017-03-131-0/+5
* radeonsi: mark all bound shader buffer ranges as initializedMarek Olšák2017-03-131-0/+3
* freedreno/ir3: fragz cannot be half precisionRob Clark2017-03-131-0/+6
* freedreno/ir3: optimize less in glslRob Clark2017-03-131-1/+1
* svga: handle P016 format as wellChristian König2017-03-131-0/+1
* radeon/uvd: enable 10bit HEVC decode v2Christian König2017-03-132-8/+20
* radeon/UVD: fix the decoding target pitch calculationChristian König2017-03-131-1/+1
* gallium/util: replace pipe_thread_setname() with u_thread_setname()Timothy Arceri2017-03-121-1/+1
* gallium/util: replace pipe_thread_create() with u_thread_create()Timothy Arceri2017-03-124-4/+4
* svga: remove shebang from svgadump/svga_dump.pyEmil Velikov2017-03-101-1/+0
* svga: remove execute bit from svga_dump.pyEmil Velikov2017-03-101-0/+0
* freedreno: remove shebang from ir3_nir_trig.pyEmil Velikov2017-03-101-1/+0
* freedreno: remove execute bit from ir3_nir_trig.pyEmil Velikov2017-03-101-0/+0
* nv50/ir: check for origin insn in findOriginForTestWithZeroPierre Moreau2017-03-091-0/+2
* swr: s/uint/enum pipe_render_cond_flag/Vinson Lee2017-03-081-1/+1
* vc4: Fix math with a condition flag set.Eric Anholt2017-03-082-3/+18
* vc4: Fix register pressure cost estimates when a src appears twice.Eric Anholt2017-03-081-3/+13
* vc4: Report to shader-db how many threads a fragment shader has.Eric Anholt2017-03-081-0/+7
* Revert "vc4: Lazily emit our FS/VS input loads."Eric Anholt2017-03-084-93/+75
* radeonsi: fix elimination of literal VS outputsMarek Olšák2017-03-081-4/+7
* android: r600: fix libmesa_amd_common dependencyMauro Rossi2017-03-081-0/+1
* radeonsi: s/uint/enum pipe_shader_type/Brian Paul2017-03-082-2/+4
* gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()Brian Paul2017-03-0813-13/+13
* gallium: s/uint/enum pipe_shader_type/ for set_constant_buffer()Brian Paul2017-03-0819-19/+26
* gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()Brian Paul2017-03-082-2/+4
* virgl: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-3/+3
* swr: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-084-6/+7
* softpipe: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-084-4/+6
* llvmpipe: s/unsigned/enum pipe_shader_type/Brian Paul2017-03-081-1/+1
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