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* ilo: make ilo_render_emit_flush() directChia-I Wu2014-09-266-54/+61
| | | | | | Remove emit_flush() and ILO_RENDER_FLUSH indirections. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: simplify ilo_render invalidationChia-I Wu2014-09-267-86/+83
| | | | | | | | | ilo_render is based on ilo_builder. We should only care if the builder buffers are invalidated, or if the hardware context is invalidated. Replace ilo_render_invalidate() with flags by ilo_render_invalidate_builder() and ilo_render_invalidate_hw(). Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add ilo_builder_{dynamic,surface}_used()Chia-I Wu2014-09-261-0/+15
| | | | | | Return how many DWords are used in dynamic and surface buffers respectively. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rename state buffer to dynamic bufferChia-I Wu2014-09-264-26/+26
| | | | | | | Both dynamic buffer and surface buffer are state buffers. We should not use state buffer to refer to the former. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: constify ilo_render in ilo_render_get_sample_position()Chia-I Wu2014-09-262-2/+2
| | | | | | It is a getter and is not supposed to modify ilo_render. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rename 3d_pipeline to renderChia-I Wu2014-09-2610-883/+884
| | | | | | Follow the file renaming. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: remove struct ilo_3dChia-I Wu2014-09-266-232/+167
| | | | | | | | Move members of ilo_3d that still make sense to ilo_context. With ilo_3d gone, rename functions whose names begin with ilo_3d to something more appropriate. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rename ilo_3d_pipeline*.[ch] to ilo_render*.[ch]Chia-I Wu2014-09-268-24/+24
| | | | | | They are used to build render engine commands, which can be more than 3D. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rename ilo_3d.[ch] to ilo_draw.[ch]Chia-I Wu2014-09-266-9/+9
| | | | | | | There is not much left in struct ilo_3d. We want to kill it and ilo_3d.[ch] will be bad names. Signed-off-by: Chia-I Wu <[email protected]>
* gm107/ir: take relative pfetch offset into accountIlia Mirkin2014-09-261-1/+4
| | | | | | | | | There is no dedicated instruction for this, so just combine it with the constant offset. Acked-by: Ben Skeggs <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.3" <[email protected]>
* gallivm: More fallout from disabling with LLVM 3.6Michel Dänzer2014-09-264-7/+9
| | | | | | | | The draw module would still try to use gallivm, causing many piglit tests to fail with an assertion failure. llvmpipe might have been similarly affected. Reviewed-by: Tom Stellard <[email protected]>
* gm107/ir: add support for indirect const buffer selectionIlia Mirkin2014-09-251-0/+14
| | | | | | | | This was missed in the commit that enabled it for fermi/kepler as part of ARB_gpu_shader5 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.3" <[email protected]>
* gm107/ir: fix texture argument orderIlia Mirkin2014-09-252-5/+34
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.3" <[email protected]>
* gm107/ir: fix manual TXD for array targetsIlia Mirkin2014-09-251-2/+3
| | | | | | | This parallels the fixes in commit afea9bae. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.3" <[email protected]>
* nv50/ir: avoid deleting pseudo instructions too earlyIlia Mirkin2014-09-251-1/+10
| | | | | | | | | | | What happens is that a SPLIT operation is part of the spill node, and as a pseudo op, the instruction gets erased after processing its first def. However the later defs still need to refer to it, so instead delay deleting until after that whole RA node is done processing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79462 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nv50/ir: add some comments on edge classificationIlia Mirkin2014-09-251-0/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: fix 3d blit logic for odd depth/stencil formatsIlia Mirkin2014-09-252-7/+18
| | | | | Reported-by: David Heidelberger <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: add missing depth/stencil formats to tile flag selectionIlia Mirkin2014-09-252-0/+8
| | | | | Reported-by: David Heidelberger <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* vc4: Switch from errx() to fprintf() and abort().Eric Anholt2014-09-252-8/+15
| | | | | | | | These are pretty catastrophic, "should never happen" failure paths (though 4 tests in piglit hit them currently, due to a single bug). An abort() that you can gdb on easily is probably more useful than a clean exit, particularly since a bug in piglit framework right now is causing early exit(1)s to simply not be recorded in the results at all.
* vc4: Fix miplevel validation for raster textures.Eric Anholt2014-09-251-1/+1
| | | | | We were using the un-minified value, meaning we'd reject correctly laid out textures.
* vc4: Compute max_index instead of trusting the rest of userspace.Eric Anholt2014-09-241-5/+13
| | | | | | | | | | | | | | max_index was coming from either the user telling us as part of glDrawRangeElements, or from an incidental calculation as part of some sort of primitive conversion fallback. Sometimes, it was just set to the default "I don't know" ~0 value. If it wasn't set to the actual max index, then the kernel would reject the draw call for allowing out-of-bounds VBO reads. So, compute the max index from the sizes of the VBOs, which isn't too expensive (unlike mapping and reading the index buffer) and is reliable. Fixes piglit vao-element-array-buffer.
* vc4: Move shader record setup before the draw call.Eric Anholt2014-09-241-38/+38
| | | | | The flush only happens after both are written, so we can do them in either order. This will let me compute max_index during the shader record setup.
* vc4: Add support for gl_PointCoord.Eric Anholt2014-09-241-0/+34
| | | | Fixes piglit glsl-fs-pointcoord, point-sprite, and fbo-gl_pointcoord.
* vc4: Add support for point size setting.Eric Anholt2014-09-246-6/+47
| | | | This is the support for both the global and per-vertex modes.
* vc4: Add support for line width setting.Eric Anholt2014-09-242-0/+5
| | | | | I don't see piglit tests for it, but this should be better than not emitting it at all.
* vc4: Actually add support for polygon offset.Eric Anholt2014-09-243-1/+28
| | | | | Setting the bit without setting the offset values is kind of useless. Fixes piglit polygon-offset (but not polygon-mode-offset).
* vc4: Fix swapped 565 dithering versus no-dithering render configs.Eric Anholt2014-09-241-2/+2
| | | | | Fixes many 565 piglit tests (like fbo-generatemipmap-formats) that weren't expecting dithering.
* vc4: Add support for alpha test.Eric Anholt2014-09-242-0/+70
| | | | Fixes most of piglit fbo-alphatest-formats (but not RGB565/332).
* freedreno/a3xx: initial texture border-colorRob Clark2014-09-246-15/+65
| | | | | | | | | | | | Still some open questions.. and at any rate, no additional piglit passes due to various wrap modes that we need to emulate in at least some cases :-( But it does fix some mystery page-faults.. So add some comments in the code where there are things that we need to emulate or do more r/e, and push as-is. Signed-off-by: Rob Clark <[email protected]>
* gallium/rbug: correctly unreference a sampler viewMarek Olšák2014-09-241-2/+1
| | | | | | | This fixes heap corruption. The sampler view can be bound in the context, so we cannot call destroy directly. Reviewed-by: Brian Paul <[email protected]>
* gallium/rbug: unlock a mutex in rbug_create_queryMarek Olšák2014-09-241-3/+5
| | | | Reviewed-by: Brian Paul <[email protected]>
* radeonsi: remove old cache flushing codeMarek Olšák2014-09-244-66/+1
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi/compute: do CS partial flush with si_emit_cache_flushMarek Olšák2014-09-243-6/+9
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi/compute: flush caches with si_emit_cache_flushMarek Olšák2014-09-243-23/+32
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi/compute: directly emit CONTEXT_CONTROLMarek Olšák2014-09-241-1/+5
| | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: properly destroy the GS copy shader and scratch_bo for computeMarek Olšák2014-09-242-3/+8
| | | | | Cc: 10.2 10.3 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: release GS rings at context destructionMarek Olšák2014-09-241-0/+2
| | | | | Cc: 10.2 10.3 <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't use pipe_constant_buffer for GS ringsMarek Olšák2014-09-244-26/+22
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't pass the context to the shader translatorMarek Olšák2014-09-244-22/+18
| | | | | | This should prevent accessing context state there. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't snoop currently-bound GS shader when compiling ESMarek Olšák2014-09-243-16/+101
| | | | | | | | | Instead, pass the layout of GS inputs in memory to the ES using the shader key. Only 64 bits are needed to represent the layout in the key. Mixing and matching different VS and GS shaders should now always work. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: shorten si_pipe_* prefixes to si_*Marek Olšák2014-09-248-58/+57
| | | | | | | This was the original naming convention in r600g and it somehow crept into radeonsi. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: merge si_pipe_shader into si_shaderMarek Olšák2014-09-245-92/+90
| | | | | | One is part of the other anyway. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable gl_SampleMask fragment shader output if MSAA is disabledMarek Olšák2014-09-241-3/+18
| | | | | | This fixes piglit: arb_sample_shading-builtin-gl-sample-mask 0 Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: only update MSAA-specific framebuffer state if nr_samples is changedMarek Olšák2014-09-241-23/+27
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB_SHADER_CONTROL into db_render_stateMarek Olšák2014-09-244-13/+18
| | | | | | | | | I will need this for fixing sample shading with 1 sample. The good news is that all shader pm4 states no longer use the current context state, so we can generate the pm4 states outside of draw_vbo if needed. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: set KILL_ENABLE during shader compilation, remove uses_kill flagMarek Olšák2014-09-243-5/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove shader.ps_conservative_z, set db_shader_control insteadMarek Olšák2014-09-243-8/+4
| | | | | | Also set the field on SI too. It's not just specific to CIK. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move DB registers from draw_vbo into new db_render_stateMarek Olšák2014-09-245-66/+82
| | | | | | It's called db_misc_state in r600g. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove unused variable si_pipe_shader::sprite_coord_enableMarek Olšák2014-09-242-2/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: document what si_descriptors.c doesMarek Olšák2014-09-241-0/+11
| | | | Reviewed-by: Michel Dänzer <[email protected]>
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