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Commit message (
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Author
Age
Files
Lines
*
vc4: Don't try the SF coalescing unless it's on a def.
Eric Anholt
2016-01-06
1
-3
/
+3
*
gallium/drivers/svga: Use unsigned for loop index
Edward O'Callaghan
2016-01-06
2
-7
/
+7
*
gallium/drivers/r600: Use unsigned for loop index
Edward O'Callaghan
2016-01-06
1
-9
/
+9
*
gallium/drivers/ilo: Use unsigned for loop index
Edward O'Callaghan
2016-01-06
4
-16
/
+16
*
gallium/drivers: Remove unnecessary semicolons
Edward O'Callaghan
2016-01-06
10
-11
/
+11
*
llvmpipe: Optimize lp_rast_triangle_32_3_16 for POWER8
Oded Gabbay
2016-01-06
1
-1
/
+141
*
llvmpipe: Optimize BUILD_MASK(_LINEAR) for POWER8
Oded Gabbay
2016-01-06
1
-40
/
+110
*
llvmpipe: Optimize do_triangle_ccw for POWER8
Oded Gabbay
2016-01-06
1
-0
/
+100
*
svga: fix test for SVGA_NEW_STIPPLE
Brian Paul
2016-01-05
2
-4
/
+8
*
svga: add some comments in svga_state_vs.c
Brian Paul
2016-01-05
1
-0
/
+3
*
svga: change svga_hw_view_state::dirty to boolean
Brian Paul
2016-01-05
1
-1
/
+1
*
svga: avoid emitting redundant SetVertexBuffers() commands
Brian Paul
2016-01-05
2
-5
/
+26
*
svga: check for no-ops in svga_bind_sampler_states()
Brian Paul
2016-01-05
1
-1
/
+15
*
nvc0: add support for st/va
Julien Isorce
2016-01-05
3
-50
/
+133
*
nouveau: split nouveau_vp3_bsp in begin/next/end
Julien Isorce
2016-01-05
4
-41
/
+77
*
nvc0: scale up inter_bo size so that it's 16M for a 4K video
Ilia Mirkin
2016-01-04
1
-2
/
+5
*
nv50,nvc0: fix crash when increasing bsp bo size for h264
Ilia Mirkin
2016-01-04
2
-4
/
+4
*
radeonsi: remove unused parameter from si_shader_binary_read_config
Marek Olšák
2016-01-03
3
-10
/
+7
*
radeonsi: move si_shader_binary_upload out of si_shader_binary_read
Marek Olšák
2016-01-03
3
-11
/
+10
*
gallium/radeon: dump LLVM module outside of radeon_llvm_compile
Marek Olšák
2016-01-03
4
-9
/
+12
*
gallium/radeon: always add +DumpCode to the LLVM target machine for LLVM <= 3.5
Marek Olšák
2016-01-03
4
-6
/
+5
*
gallium/radeon: r600_can_dump_shader should get TGSI processor type directly
Marek Olšák
2016-01-03
4
-15
/
+10
*
radeonsi: pass TGSI processor type to si_shader_binary_read for dumping
Marek Olšák
2016-01-03
3
-4
/
+5
*
radeonsi: pass TGSI processor type to si_compile_llvm for dumping
Marek Olšák
2016-01-03
3
-5
/
+5
*
radeonsi: rename shader parameter definitions and variables for more clarity
Marek Olšák
2016-01-03
3
-43
/
+43
*
nvc0/ir: add support for PK2H/UP2H
Ilia Mirkin
2016-01-03
4
-2
/
+28
*
gallium: add PIPE_CAP_TGSI_PACK_HALF_FLOAT to indicate UP2H/PK2H support
Ilia Mirkin
2016-01-03
14
-0
/
+14
*
freedreno/ir3: use NIR_PASS helper macros
Rob Clark
2016-01-03
1
-19
/
+28
*
freedreno/ir3: we require block_index metadata
Rob Clark
2016-01-03
1
-0
/
+2
*
freedreno/ir3: refactor NIR IR handling
Rob Clark
2016-01-03
7
-111
/
+202
*
freedreno/ir3: drop unnecessary unreachable() case
Rob Clark
2016-01-03
1
-2
/
+0
*
nv50,nvc0: optimize coherent buffer checking at draw time
Samuel Pitoiset
2016-01-03
6
-68
/
+82
*
vc4: Fix build from upload changes.
Eric Anholt
2016-01-02
1
-1
/
+1
*
gallium/radeon: send LLVM diagnostics as debug messages
Nicolai Hähnle
2016-01-02
1
-15
/
+46
*
gallium/radeon: pass pipe_debug_callback into radeon_llvm_compile (v2)
Nicolai Hähnle
2016-01-02
7
-9
/
+18
*
radeonsi: send shader info as debug messages in addition to stderr output
Nicolai Hähnle
2016-01-02
1
-14
/
+55
*
radeonsi: pass pipe_debug_callback down into si_shader_binary_read (v2)
Nicolai Hähnle
2016-01-02
4
-14
/
+22
*
gallium/radeon: implement set_debug_callback
Nicolai Hähnle
2016-01-02
2
-0
/
+14
*
u_upload_mgr: allow specifying PIPE_USAGE_* for the upload buffer
Marek Olšák
2016-01-02
8
-8
/
+13
*
u_upload_mgr: remove alignment parameter from u_upload_create
Marek Olšák
2016-01-02
8
-10
/
+7
*
u_upload_mgr: pass alignment to u_upload_buffer manually
Marek Olšák
2016-01-02
1
-1
/
+1
*
u_upload_mgr: pass alignment to u_upload_data manually
Marek Olšák
2016-01-02
8
-11
/
+11
*
u_upload_mgr: pass alignment to u_upload_alloc manually
Marek Olšák
2016-01-02
15
-17
/
+23
*
nv50,nvc0: make sure there's pushbuf space and that we ref the bo early
Ilia Mirkin
2016-01-01
4
-6
/
+5
*
nvc0: Set winding order regardless of domain.
Kenneth Graunke
2015-12-30
1
-2
/
+4
*
nvc0: add ARB_shader_draw_parameters support
Ilia Mirkin
2015-12-30
13
-15
/
+73
*
gallium: add PIPE_CAP_DRAW_PARAMETERS
Ilia Mirkin
2015-12-30
14
-0
/
+14
*
nv50/ir: attempt to do more constant folding on mad -> add conversion
Ilia Mirkin
2015-12-30
1
-11
/
+10
*
nv50/ir: float(s32 & 0xff) = float(u8), not s8
Ilia Mirkin
2015-12-29
1
-0
/
+3
*
radeonsi: add RADEON_REPLACE_SHADERS debug option
Nicolai Hähnle
2015-12-29
3
-5
/
+105
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