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* radeonsi: fix out-of-bounds indexing of shader imagesNicolai Hähnle2016-03-231-1/+43
* radeonsi: cache flush/invalidation for missing PIPE_BARRIER_*_BUFFER bits (v2)Nicolai Hähnle2016-03-231-2/+12
* radeonsi: fix 2D array MSAA failures since image support landedMarek Olšák2016-03-231-1/+2
* r600/sb: Do not distribute neg in expr_handler::fold_assoc() when folding mul...xavier2016-03-221-2/+6
* nvc0: make sure to delete samplers used by compute shadersSamuel Pitoiset2016-03-211-1/+1
* radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGESEdward O'Callaghan2016-03-211-1/+2
* radeonsi: disable early Z if the fragment shader writes to memoryNicolai Hähnle2016-03-211-2/+12
* radeonsi: force the DCC enable bit off in image descriptors for writing (v2)Nicolai Hähnle2016-03-211-8/+49
* radeonsi: implement MemoryBarrier (v2)Nicolai Hähnle2016-03-211-0/+37
* radeonsi: implement volatile memory accessNicolai Hähnle2016-03-211-0/+4
* radeonsi: implement coherent memory access (v2)Nicolai Hähnle2016-03-211-4/+13
* radeonsi: Lower TGSI_OPCODE_MEMBAR down to LLVM opNicolai Hähnle2016-03-211-0/+31
* radeonsi: Lower TGSI_OPCODE_ATOM* down to LLVM opNicolai Hähnle2016-03-211-8/+113
* radeonsi: Lower TGSI_OPCODE_STORE down to LLVM opNicolai Hähnle2016-03-211-3/+80
* radeonsi: Lower TGSI_OPCODE_LOAD down to LLVM op (v3)Nicolai Hähnle2016-03-211-0/+139
* radeonsi: extract the LLVM type name construction into its own functionNicolai Hähnle2016-03-211-7/+19
* radeonsi: Lower TGSI_OPCODE_RESQ down to LLVM opNicolai Hähnle2016-03-211-0/+129
* radeonsi: extract TXQ buffer size computation into its own functionNicolai Hähnle2016-03-211-20/+35
* radeonsi: decompress shader imagesNicolai Hähnle2016-03-211-3/+33
* radeonsi: update shader image descriptor for invalidated bufferNicolai Hähnle2016-03-211-1/+21
* radeonsi: implement set_shader_images (v2)Nicolai Hähnle2016-03-216-29/+254
* gallium/radeon: make r600_texture_disable_dcc externally accessibleNicolai Hähnle2016-03-212-2/+4
* svga: add svga_winsys_context::pipe_debug_callback pointerBrian Paul2016-03-212-2/+9
* svga: Fix the index buffer rebind regressionCharmaine Lee2016-03-211-7/+2
* svga: rebind stream output targetsCharmaine Lee2016-03-213-0/+27
* svga: rebind index bufferCharmaine Lee2016-03-212-0/+9
* svga: minor formatting fix, comment additionBrian Paul2016-03-211-1/+4
* svga: optimize constant buffer uploadsCharmaine Lee2016-03-211-1/+11
* svga: add a few more resource updates HUD queryCharmaine Lee2016-03-216-22/+91
* svga: add new num-readbacks HUD queryCharmaine Lee2016-03-215-7/+24
* svga: use shader sampler view declarationsBrian Paul2016-03-216-47/+74
* nouveau: codegen: Do not silently fail in handeLOAD / handleSTORE / handleATOMHans de Goede2016-03-211-9/+18
* nouveau: codegen: Disable more old resource handling codeHans de Goede2016-03-211-3/+12
* nouveau: codegen: gk110: Make emitSTORE offset handling identical to emitLOADHans de Goede2016-03-211-3/+1
* nouveau: codegen: Slightly refactor Source::scanInstruction() dst handlingHans de Goede2016-03-211-6/+6
* nouveau: codegen: Add support for clover / OpenCL kernel input parametersHans de Goede2016-03-211-3/+15
* tgsi: Add support for global / private / input MEMORYHans de Goede2016-03-211-3/+4
* nv50/ir: fix indirect texturing for non-array textures on nvc0Ilia Mirkin2016-03-201-3/+7
* nv50/ir: normalize cube coordinates after derivatives have been computedIlia Mirkin2016-03-204-15/+84
* gallium/radeon: remove remnants of R600 TGSI->LLVMMarek Olšák2016-03-202-20/+0
* r600g: flatten if (1) statement after removal of TGSI->LLVMMarek Olšák2016-03-201-81/+79
* r600g: remove TGSI->LLVM translationMarek Olšák2016-03-209-1107/+89
* gallium/radeon: remove old CS tracingMarek Olšák2016-03-2013-84/+19
* radeonsi: process TGSI property NEXT_SHADERMarek Olšák2016-03-192-3/+33
* nvc0/ir: Use double constant in handleSQRTPierre Moreau2016-03-191-1/+1
* nv50/ir: force-enable derivatives on TXD opsIlia Mirkin2016-03-192-1/+4
* nv50: reset TFB bufctx when we no longer hold a reference to the buffersIlia Mirkin2016-03-192-3/+3
* nvc0: avoid using magic numbers for the uniform_bo offsetsSamuel Pitoiset2016-03-198-44/+73
* nv50/ir: make use of auxCBSlot instead of magic numbersSamuel Pitoiset2016-03-192-2/+4
* nv50,nvc0: replace resInfoCBSlot by auxCBSlotSamuel Pitoiset2016-03-196-16/+10
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