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* virgl: clear vertex_array_dirtyChia-I Wu2019-04-221-0/+2
* iris: Enable the dual_color_blend_by_location driconf option.Kenneth Graunke2019-04-224-0/+24
* iris: Add mechanism for iris-specific driconf optionsKenneth Graunke2019-04-226-3/+42
* lima: add Android buildIcenowy Zheng2019-04-211-0/+88
* panfrost/mdg: Use shared fsign loweringAlyssa Rosenzweig2019-04-194-11/+4
* panfrost: Fixup vertex offsets to prevent shadow copyAlyssa Rosenzweig2019-04-192-43/+67
* panfrost: Track BO lifetime with jobs and reference countsAlyssa Rosenzweig2019-04-199-37/+207
* lima: enable nir fsign lowering in ppirErico Nunes2019-04-191-0/+1
* lima/ppir: support ppir_op_ceilErico Nunes2019-04-193-0/+14
* iris: Be less aggressive at postdraw work skippingKenneth Graunke2019-04-181-28/+36
* virgl: wait after a flushGurchetan Singh2019-04-183-6/+12
* radeonsi/gfx9: use the correct condition for the DPBB + QUANT_MODE workaroundMarek Olšák2019-04-181-4/+4
* freedreno: Fix format string warningKristian H. Kristensen2019-04-181-1/+1
* freedreno/a6xx: Add helper for incrementing regidKristian H. Kristensen2019-04-181-1/+10
* freedreno: Use enum values from matching enumKristian H. Kristensen2019-04-182-3/+3
* freedreno/a2xx: Fix redundant if statementKristian H. Kristensen2019-04-181-16/+14
* iris: implement WaEnableStateCacheRedirectToCSLionel Landwerlin2019-04-181-0/+7
* virgl: document potentially failing blitErik Faye-Lund2019-04-171-0/+6
* virgl: do color-conversion during when mapping transferErik Faye-Lund2019-04-171-10/+70
* virgl: only blit if resource is readErik Faye-Lund2019-04-171-2/+5
* virgl: get readback-formats from hostErik Faye-Lund2019-04-173-0/+44
* virgl: make sure bind is set for non-buffersErik Faye-Lund2019-04-171-0/+3
* virgl: support write-back with staged transfersErik Faye-Lund2019-04-172-22/+49
* virgl: use pipe_box for blit dst-rectErik Faye-Lund2019-04-171-5/+12
* virgl: rewrite core of virgl_texture_transfer_mapErik Faye-Lund2019-04-171-36/+58
* virgl: return error if allocating resolve_tmp failsErik Faye-Lund2019-04-171-0/+4
* virgl: wait for the right resourceErik Faye-Lund2019-04-171-1/+1
* virgl: check for readback on correct resourceErik Faye-Lund2019-04-171-1/+1
* virgl: make unmap queuing a bit more straight-forwardErik Faye-Lund2019-04-171-5/+7
* virgl: simplify virgl_texture_transfer_unmap logicErik Faye-Lund2019-04-171-13/+9
* virgl: track full virgl_resource instead of just virgl_hw_resErik Faye-Lund2019-04-171-5/+5
* virgl: tmp_resource -> templErik Faye-Lund2019-04-171-4/+3
* virgl: remove pointless transfer-counterErik Faye-Lund2019-04-174-4/+2
* radeonsi/nir: fix scanning of bindless imagesTimothy Arceri2019-04-171-38/+37
* iris: Add texture cache flushing hacks for blit and resource_copy_regionKenneth Graunke2019-04-161-0/+36
* iris: Change vendor and renderer stringsKenneth Graunke2019-04-161-1/+4
* iris: Move iris_debug_recompile calls before uploading.Kenneth Graunke2019-04-161-33/+33
* iris: Print the reason for shader recompiles.Kenneth Graunke2019-04-161-6/+30
* nir: optimize gl_SampleMaskIn to gl_HelperInvocation for radeonsi when possibleMarek Olšák2019-04-161-0/+1
* radeon/vce:Add support for frame_cropping_flag of VAEncSequenceParameterBuffe...suresh guttula2019-04-161-2/+9
* iris: Make shader_perf_log print to stderr if INTEL_DEBUG=perf is setKenneth Graunke2019-04-151-4/+11
* virgl: hide fence internals from the driverChia-I Wu2019-04-152-13/+2
* virgl: handle fence_server_sync in winsysChia-I Wu2019-04-153-8/+3
* vc4: fix buildRhys Perry2019-04-151-1/+0
* iris: Fix FLUSH_EXPLICIT handling with staging buffers.Kenneth Graunke2019-04-151-23/+41
* iris: Preserve all PIPE_TRANSFER flags in xfer->usageKenneth Graunke2019-04-152-13/+12
* iris: Actually mark blorp_copy_buffer destinations as written.Kenneth Graunke2019-04-151-0/+1
* Delete autotoolsDylan Baker2019-04-1532-1247/+0
* radeonsi: enable GL_EXT_shader_image_load_formattedMarek Olšák2019-04-151-0/+1
* gallium: add support for formatted image loadsRhys Perry2019-04-155-0/+5
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