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drivers
Commit message (
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Author
Age
Files
Lines
*
freedreno: convert blit program to array for each number of rts
Ilia Mirkin
2015-04-02
12
-21
/
+45
*
freedreno: add support for laying out MRTs in gmem
Ilia Mirkin
2015-04-02
2
-16
/
+43
*
freedreno: add core infrastructure support for MRTs
Ilia Mirkin
2015-04-02
4
-8
/
+14
*
freedreno/ir3: add support for FS_COLOR0_WRITES_ALL_CBUFS property
Ilia Mirkin
2015-04-02
2
-1
/
+10
*
freedreno/a3xx: add independent blend function support
Ilia Mirkin
2015-04-02
2
-8
/
+9
*
freedreno: remove alpha key from ir3_shader
Ilia Mirkin
2015-04-02
9
-42
/
+8
*
i915g: Implement EGL_EXT_image_dma_buf_import
Stéphane Marchesin
2015-04-01
2
-1
/
+2
*
vc4: Add shader-db dumping of NIR instruction count.
Eric Anholt
2015-04-01
1
-0
/
+29
*
vc4: Convert to consuming NIR.
Eric Anholt
2015-04-01
5
-720
/
+707
*
vc4: Tell shader-db how big our UBOs are, if present.
Eric Anholt
2015-04-01
1
-0
/
+6
*
nouveau: synchronize "scratch runout" destruction with the command stream
Marcin Ślusarz
2015-03-31
2
-19
/
+37
*
radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader ...
Tom Stellard
2015-03-31
1
-1
/
+5
*
radeon/vce: implement video usability information support
Leo Liu
2015-03-31
3
-0
/
+59
*
llvmpipe: enable ARB_texture_gather
Roland Scheidegger
2015-03-31
1
-2
/
+3
*
gallivm: simplify sampler interface
Roland Scheidegger
2015-03-31
1
-26
/
+7
*
vc4: Drop integer multiplies with 0 to moves of 0.
Eric Anholt
2015-03-30
1
-0
/
+8
*
vc4: Add a constant folding pass.
Eric Anholt
2015-03-30
4
-0
/
+113
*
vc4: Don't bother masking out the low 24 bits for integer multiplies
Eric Anholt
2015-03-30
1
-12
/
+8
*
vc4: Make integer multiply use 24 bits for the low parts.
Eric Anholt
2015-03-30
1
-5
/
+5
*
radeonsi: Cache LLVMTargetMachineRef in context instead of in screen
Michel Dänzer
2015-03-30
6
-30
/
+41
*
freedreno/a3xx: add support for point sprite coordinate replacement
Ilia Mirkin
2015-03-28
4
-30
/
+28
*
freedreno/a3xx: make vs-set point size work
Ilia Mirkin
2015-03-28
3
-2
/
+10
*
freedreno/a3xx: point size should not be divided by 2
Ilia Mirkin
2015-03-28
2
-5
/
+5
*
freedreno/a3xx: fix 3d texture layout
Ilia Mirkin
2015-03-28
2
-7
/
+16
*
freedreno/a3xx: LAYERSZ2 appears to have no effect on arrays
Ilia Mirkin
2015-03-28
1
-2
/
+1
*
llvmpipe: simplify address calculation for 4x4 blocks
Roland Scheidegger
2015-03-28
4
-76
/
+35
*
nv50/ir/gk110: fix offset flag position for TXD opcode
Ilia Mirkin
2015-03-27
1
-0
/
+1
*
nv50/ir: take postFactor into account when doing peephole optimizations
Ilia Mirkin
2015-03-27
1
-4
/
+8
*
gallivm: pass jit_context pointer through to sampling
Roland Scheidegger
2015-03-27
3
-18
/
+19
*
gallium/util: remove u_linkage
Ilia Mirkin
2015-03-26
2
-2
/
+0
*
vc4: Add a dump-the-surface-contents routine.
Eric Anholt
2015-03-24
2
-0
/
+101
*
vc4: Fix pitch alignment of linear textures.
Eric Anholt
2015-03-24
1
-1
/
+1
*
vc4: Write the alignment of level width consistently in validation.
Eric Anholt
2015-03-24
1
-2
/
+2
*
vc4: Fix use of a bool as an enum.
Eric Anholt
2015-03-24
1
-1
/
+1
*
vc4: Decide the HW's format before laying out the miptree.
Eric Anholt
2015-03-24
1
-3
/
+3
*
vc4: Use our device-specific ioctls for create/mmap.
Eric Anholt
2015-03-24
1
-15
/
+36
*
vc4: Make a new #define for making code conditional on the simulator.
Eric Anholt
2015-03-24
3
-15
/
+25
*
vc4: Add some useful debug printfs for miptrees.
Eric Anholt
2015-03-24
1
-0
/
+37
*
Revert "nv50,nvc0: remove bogus 64_FLOAT formats"
Ilia Mirkin
2015-03-23
1
-0
/
+5
*
gallium: implement get_device_vendor() for existing drivers
Giuseppe Bilotta
2015-03-23
13
-0
/
+83
*
galahad: actually remove the driver
Emil Velikov
2015-03-21
10
-1998
/
+0
*
llvmpipe: use global llvm context for PIPE_SUBSYSTEM_EMBEDDED
Roland Scheidegger
2015-03-21
1
-0
/
+11
*
u_primconvert: add primitive restart support
Dave Airlie
2015-03-20
1
-1
/
+2
*
freedreno/ir3: fix infinite recursion in sched
Rob Clark
2015-03-18
1
-1
/
+1
*
freedreno: fix spelling
Rob Clark
2015-03-18
1
-1
/
+1
*
radeonsi: increase coords array size for radeon_llvm_emit_prepare_cube_coords
Marek Olšák
2015-03-18
2
-2
/
+2
*
r600g: constify r600_shader_tgsi_instruction lists.
Emil Velikov
2015-03-17
1
-5
/
+5
*
r600g: kill off r600_shader_tgsi_instruction::{tgsi_opcode,is_op3}
Emil Velikov
2015-03-17
1
-591
/
+589
*
r600g: use the tgsi opcode from parse.FullToken.FullInstruction
Emil Velikov
2015-03-17
1
-5
/
+8
*
radeonsi: implement TGSI_OPCODE_BFI (v2)
Marek Olšák
2015-03-16
1
-0
/
+34
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