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* Merge branch 'draw-instanced'Brian Paul2011-01-153-1/+6
|\ | | | | | | | | | | | | | | Conflicts: src/gallium/auxiliary/draw/draw_llvm.c src/gallium/drivers/llvmpipe/lp_state_fs.c src/glsl/ir_set_program_inouts.cpp src/mesa/tnl/t_vb_program.c
| * llvmpipe: enable instanced drawing capBrian Paul2010-12-081-0/+2
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| * softpipe: enable instanced drawing capBrian Paul2010-12-081-0/+2
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| * gallivm/llvmpipe: implement system values and instanceIDBrian Paul2010-12-081-1/+2
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* | nvc0: try to swap immediates to first source tooChristoph Bumiller2011-01-151-0/+7
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* | nvc0: make sure all sources of the BIND op are distinctChristoph Bumiller2011-01-153-0/+45
| | | | | | | | | | They're supposed to be assigned consecutive registers so they can't contain the same SSA value more than once.
* | nvc0: update user vbufs on each draw callChristoph Bumiller2011-01-154-37/+119
| | | | | | | | This is required in case set_vertex_buffers is not called again.
* | nvc0: enable early fragment tests where possibleChristoph Bumiller2011-01-153-2/+13
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* | nvc0: upload small buffers through the command bufferChristoph Bumiller2011-01-151-0/+6
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* | r600g: compiler helper opcode fixes for evergreenAlex Deucher2011-01-142-120/+269
| | | | | | | | Signed-off-by: Alex Deucher <[email protected]>
* | r600g: pass r600_bc to some addition compiler helper functionsAlex Deucher2011-01-141-55/+62
| | | | | | | | | | | | needed for asic specific opcodes Signed-off-by: Alex Deucher <[email protected]>
* | r600g: Disable V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR case.Vinson Lee2011-01-141-0/+2
| | | | | | | | | | | | The usage of macro V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR was introduced by commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c but the macro is undefined. Disable this case to fix the build for now.
* | r600g: add more missing instructions to r600_bc_get_num_operandsChristian König2011-01-141-1/+5
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* | r600g: Move declaration before code in r600_asm.c.Vinson Lee2011-01-131-1/+3
| | | | | | | | Fixes SCons build.
* | r600g: rework literal handlingChristian König2011-01-135-277/+151
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* | r600g: merge alu groupsChristian König2011-01-132-37/+150
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* | r600g: implement replacing gpr with pv and psChristian König2011-01-133-5/+63
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* | r600g: add missing RECIPSQRT_CLAMPED to r600_bc_get_num_operandsChristian König2011-01-131-0/+1
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* | r600g: rework bank swizzle codeChristian König2011-01-132-183/+174
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* | r600g: fix alu slot assignmentChristian König2011-01-131-15/+167
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* | r600g: optimize away CF ALU instructions even if type doesn't matchChristian König2011-01-131-3/+16
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* | nvc0: identify POINT_RASTER_RULES, add POINT_SMOOTH stateChristoph Bumiller2011-01-134-19/+42
| | | | | | | | | | | | Point smoothing requires rasterization rules to be set to OGL. Sorry for the extra noise caused by the header update.
* | r600g: Silence uninitialized variable warnings.Vinson Lee2011-01-131-4/+4
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* | nvc0: disable calling of sw methods we don't implementBen Skeggs2011-01-131-0/+4
| | | | | | | | | | | | | | Left in the code as a marker of what NVIDIA do, just in case we need to do this some day. Signed-off-by: Ben Skeggs <[email protected]>
* | nvc0: fix mp_stack_bo relocationBen Skeggs2011-01-131-2/+2
| | | | | | | | | | | | | | | | | | | | Fixes a PT_NOT_PRESENT error cause by: - allocating in VRAM - emitting GART relocs to 0x17bc/0x17c0, moving the buffer - telling the bufmgr that the buffer should be in VRAM when we use it, but not correcting the value sent to 0x17bc/0x17c0. Signed-off-by: Ben Skeggs <[email protected]>
* | noop: change var type to silence warningBrian Paul2011-01-121-1/+1
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* | r600g: also look at tex inst when for maximum gpu countChristian König2011-01-121-1/+7
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* | r600g: implement output modifiers and use them to further optimize LRPChristian König2011-01-124-0/+33
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* | r600g: use special constants for 0, 1, -1, 1.0f, 0.5f etcChristian König2011-01-121-12/+44
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* | r600g: optimize temp register handling for LRPChristian König2011-01-121-34/+38
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* | r600g: optimize away CF_INST_POPChristian König2011-01-123-3/+29
| | | | | | | | | | If last instruction is an CF_INST_ALU we don't need to emit an additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
* | r600g: make dumping of shaders an optionChristian König2011-01-121-4/+14
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* | r600g: fix alu dumpingChristian König2011-01-121-19/+13
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* | r600g: improve r600_bc_dumpChristian König2011-01-121-28/+131
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* | r600g: texture instructions also work fine with TGSI_FILE_INPUTChristian König2011-01-121-1/+3
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* | r600g: DP4 also supports writemaskingChristian König2011-01-121-8/+6
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* | r600g: Why all this fiddling with tgsi_helper_copy?Christian König2011-01-121-21/+41
| | | | | | | | | | | | | | | | tgsi_helper_copy is used on several occasions to copy a temporary result into the real destination register to emulate writemasks for OP3 and reduction operations. According to R600 ISA that's unnecessary. This patch fixes this use for MAD, CMP and DP4.
* | r600g: fix tex and vtx joiningChristian König2011-01-121-2/+2
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* | r600g: Fixed SIN/COS/SCS for the case where the operand is a literal.Tilman Sauerbeck2011-01-111-2/+15
| | | | | | | | | | Signed-off-by: Tilman Sauerbeck <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* | r600g: move user fence into base radeon structureJerome Glisse2011-01-111-3/+0
| | | | | | | | | | | | | | This avoid any issue when context is free and we still try to access fence through radeon structure. Signed-off-by: Jerome Glisse <[email protected]>
* | r300g: add debug option for buffer upload loggingMarek Olšák2011-01-103-0/+9
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* | noop: make noop useable like trace or rbugJerome Glisse2011-01-092-47/+35
| | | | | | | | | | | | | | | | If you want to enable noop set GALLIUM_NOOP=1 as an env variable. You need first to enable noop wrapping for your driver see change to src/gallium/targets/dri-r600/ in this commit as an example. Signed-off-by: Jerome Glisse <[email protected]>
* | r300g: do not upload the same user buffer several timesMarek Olšák2011-01-091-1/+3
| | | | | | | | Performance++.
* | nvc0: implement queriesChristoph Bumiller2011-01-0910-23/+432
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* | i965g: fix warningsDave Airlie2011-01-092-2/+1
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* | i965g: update intel_decode from upstream.Dave Airlie2011-01-094-137/+432
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* | i965g: update disassembler code from classic.Dave Airlie2011-01-098-34/+95
| | | | | | | | still a bit of work to do, the winsys gen setting is a bit of a hack.
* | i965g: update brw_defines.h from classic driverDave Airlie2011-01-093-37/+397
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* | i965g: update brw_structs.h from classic driver.Dave Airlie2011-01-093-88/+288
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* | i965g: update to similiar gen stuff as i965Dave Airlie2011-01-0933-151/+173
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