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* ilo: add image_set_gen6_bo_size()Chia-I Wu2015-07-013-118/+89
* ilo: add image_set_gen6_{hiz,mcs}Chia-I Wu2015-07-011-49/+61
* ilo: add image_get_gen6_monolithic_size()Chia-I Wu2015-07-011-67/+67
* ilo: add image_get_gen6_lods()Chia-I Wu2015-07-011-88/+148
* ilo: add image_get_gen{6,7}_alignment()Chia-I Wu2015-07-011-159/+177
* ilo: add image_get_gen6_{hiz,mcs}_enable()Chia-I Wu2015-07-011-101/+97
* ilo: add image_get_gen6_tiling()Chia-I Wu2015-07-011-132/+177
* ilo: add image_get_gen6_layout()Chia-I Wu2015-07-011-82/+107
* nv50/ir: copy joinAt when splitting both before and afterIlia Mirkin2015-07-013-0/+5
* freedreno: use consistent version string formatTimothy Arceri2015-07-011-1/+1
* nir/from_ssa: add a flag to not convert everything from SSAConnor Abbott2015-06-301-1/+1
* freedreno/ir3: cache defining instructionRob Clark2015-06-303-69/+91
* freedreno/ir3: fix RA issue with faninRob Clark2015-06-301-5/+15
* freedreno/ir3: add ir3_shader_disasm()Rob Clark2015-06-303-120/+124
* freedreno/a4xx: fix for sparse-samplersRob Clark2015-06-301-3/+7
* freedreno/ir3: fix crash in fail pathRob Clark2015-06-303-3/+12
* freedreno/ir3: fix crash in RARob Clark2015-06-301-2/+5
* freedreno/ir3: fixes for indirect writesRob Clark2015-06-303-4/+12
* freedreno/ir3: fix constlen in case of load_uniform_indirectRob Clark2015-06-301-0/+5
* nv50/ir: fix emission of address reg in 3rd sourceIlia Mirkin2015-06-301-2/+6
* nv30: align transfer stride to 64, required by blit, sifm transfer implsIlia Mirkin2015-06-291-2/+2
* nv30: allow vertex state creation with 0 elementsIlia Mirkin2015-06-291-2/+3
* nv30: reset fragprog bufctx at bind timeIlia Mirkin2015-06-291-1/+8
* nv30: modernize fp upload logicIlia Mirkin2015-06-291-10/+14
* nv30: provide a minimum map buffer alignmentIlia Mirkin2015-06-291-1/+2
* gallium: add PIPE_COMPUTE_CAP_SUBGROUP_SIZEGrigori Goronzy2015-06-294-0/+38
* nv30: avoid leaking blit fp/vpIlia Mirkin2015-06-291-0/+6
* nv40: enable base vertexIlia Mirkin2015-06-293-4/+5
* radeonsi: add support for geometry shader invocations.Dave Airlie2015-06-274-1/+13
* radeonsi: add support for viewport array (v3)Dave Airlie2015-06-276-40/+69
* nv50/ir: propagate modifier to right arg when const-folding madIlia Mirkin2015-06-261-1/+4
* mesa: Enable subdir-objects globally.Matt Turner2015-06-267-14/+0
* ilo: define ILO_IMAGE_MAX_LEVEL_COUNTChia-I Wu2015-06-264-8/+16
* ilo: replace pipe_format by gen_surface_formatChia-I Wu2015-06-2613-142/+174
* ilo: always use the specified image formatChia-I Wu2015-06-264-69/+115
* ilo: replace pipe_texture_target by gen_surface_typeChia-I Wu2015-06-268-125/+98
* ilo: initialize ilo_image from ilo_image_infoChia-I Wu2015-06-263-179/+242
* ilo: remove ilo_image_disable_aux()Chia-I Wu2015-06-263-28/+2
* ilo: improve SURFTYPE_BUFFER validationsChia-I Wu2015-06-262-81/+139
* ilo: remove ilo_bufferChia-I Wu2015-06-2610-68/+109
* ilo: introduce ilo_vmaChia-I Wu2015-06-2621-315/+419
* radeonsi: don't fail in si_shader_io_get_unique_indexMarek Olšák2015-06-251-2/+6
* svga: silence warnings about unexpected shader typeBrian Paul2015-06-241-1/+3
* vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL.Eric Anholt2015-06-231-2/+14
* vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER.Eric Anholt2015-06-232-2/+38
* vc4: Don't try to CSE color reads.Eric Anholt2015-06-231-1/+2
* vc4: Make a helper for TLB color writes, too.Eric Anholt2015-06-232-1/+2
* vc4: Pull the blending operation out to a separate function.Eric Anholt2015-06-231-38/+50
* vc4: Clarify size calculation for Z/S writes.Eric Anholt2015-06-231-1/+1
* vc4: Add an "args" temporary for RCL setup.Eric Anholt2015-06-231-24/+24
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