summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Collapse)AuthorAgeFilesLines
* iris/screen: use initialization routine for gen_device_infoMark Janes2019-08-011-5/+3
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/common: provide common ioctl routineMark Janes2019-08-014-45/+34
| | | | | | | | | | | i965 links against libdrm for drmIoctl, but anv and iris both re-implement this routine to avoid the dependency. intel/dev also needs an ioctl wrapper, so lets share the same implementation everywhere. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* panfrost: Remove unused argumentAlyssa Rosenzweig2019-08-014-4/+1
| | | | | | A relic from when we didn't have an online compiler, hah. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Handle MESA_SHADER_COMPUTE in compile callbackAlyssa Rosenzweig2019-08-011-0/+5
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Use gl_shader_stage directly for compilesAlyssa Rosenzweig2019-08-014-32/+9
| | | | | | No need to add a third set of enums to the mix. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Emit "draw" info for compute jobsAlyssa Rosenzweig2019-08-011-0/+2
| | | | | | | Important fields relating to shader state and UBOs are filled out from this (misnomer) function. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Feed compute shaders into the compilerAlyssa Rosenzweig2019-08-011-3/+25
| | | | | | | | The path for compute shader compiles resembles the graphic shader compile path, although it is substantially simpler as we don't need any shader keying. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose compute shaders as panfrost_shader_variantsAlyssa Rosenzweig2019-08-012-2/+14
| | | | | | Whether variants are packed by graphics or compute is irrelevant. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove shader state *baseAlyssa Rosenzweig2019-08-012-4/+0
| | | | | | It is now unused. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove CSO dependency from shader_compileAlyssa Rosenzweig2019-08-013-10/+26
| | | | | | | We want this routine to be generic across graphics and compute, so let the caller deal with the typing. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Generalize UBO upload for other shader stagesAlyssa Rosenzweig2019-08-011-4/+7
| | | | | | Now that everything is unified, this generalization is nice and easy. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Guard vertex upload by ctx->vertex != NULLAlyssa Rosenzweig2019-08-011-1/+2
| | | | | | This is irrelevant for graphics but matters for compute workloads. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Generalize vertex shader uploadAlyssa Rosenzweig2019-08-011-11/+21
| | | | | | This allows us to reuse the same code path for compute. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Share gl_enables between VERTEX/COMPUTEAlyssa Rosenzweig2019-08-011-0/+3
| | | | | | Catch-all for magic bits. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Invoke compute shader according to grid infoAlyssa Rosenzweig2019-08-011-0/+6
| | | | | | | | We already have helpers for packing invocations (due to its role in instanced vertex shaders), so we can reuse this drop in for compute shaders. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Explain and include compute FBDAlyssa Rosenzweig2019-08-011-0/+17
| | | | | | | | | | | Squint at it hard enough and you realize it's the beginning of an SFBD... I guess... A compute shader with register spilling would be able to confirm this, but we would expect to see the first field | 1 and an address splattered later, setting up TLS. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify-driven cleanupAlyssa Rosenzweig2019-08-011-20/+6
| | | | | | Again, now that stages are unified some logic goes away. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify ctx->vs and ctx->fsAlyssa Rosenzweig2019-08-013-25/+21
| | | | | | | It's a little verbose, but this way we can support other shader stages without too much contortion. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Flesh out launch_grid stubAlyssa Rosenzweig2019-08-011-4/+23
| | | | | | | It's still incomplette, but we're able to hook into launch_grid to create a stub COMPUTE job. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Cleanup via payload unificationAlyssa Rosenzweig2019-08-011-20/+8
| | | | | | Since these are now indexable, quite a bit of code cleans up. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify payload_vertex/payload_tilerAlyssa Rosenzweig2019-08-013-58/+57
| | | | | | | Rather than disparate variables, let's use an array of payloads indexed by the shader stage. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Only wallpaper if we drew somethingAlyssa Rosenzweig2019-08-011-1/+1
| | | | | | | last_tiler.gpu may be NULL at flush time despite no clear and existing jobs -- if we executed a compute-only workload. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Adjust shader CAPs to expose dEQP computeAlyssa Rosenzweig2019-08-011-2/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose NIR as our PIPE_SHADER_CAP_SUPPORTED_IRSAlyssa Rosenzweig2019-08-011-1/+1
| | | | | | | We *could* expose TGSI as well -- we pipe it through tgsi_to_nir for Gallium-internal shaders anyway -- but we'd rather not. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Copy freedreno's panfrost_get_compute_paramAlyssa Rosenzweig2019-08-011-0/+70
| | | | | | | Values reported here aren't remotely correct, but it's a start to just get the entrypoint stubbed out. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose COMPUTE-related caps for GLES3.1Alyssa Rosenzweig2019-08-011-4/+8
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out launch_gridAlyssa Rosenzweig2019-08-011-0/+13
| | | | | | Just dumps some information about the invocation for later debug. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out compute CSOAlyssa Rosenzweig2019-08-014-0/+68
| | | | | | Doesn't do anything, just gets the functions there. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement gl_FrontFacingAlyssa Rosenzweig2019-08-014-0/+27
| | | | | | | Interestingly, this requires no compiler changes. It's just exposed as a special varying. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* iris: add support for gl_ClipVertex in tess eval shadersTimothy Arceri2019-08-013-2/+28
| | | | | | Required for OpenGL compat support. Reviewed-by: Kenneth Graunke <[email protected]>
* iris: add support for gl_ClipVertex in geometry shadersTimothy Arceri2019-08-013-21/+48
| | | | | | This will enable us to support the OpenGL compat profile. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Stop whacking gl_FrontFacing to a system valueJason Ekstrand2019-08-013-0/+4
| | | | | | | | | | We have a cap bit for gallium and a GLSL compiler flag to control this. Just trust what GLSL gives us and stop forcing it. In order for this to be safe, we have to advertise another cap in some of the gallium drivers. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* panfrost: Implement panfrost_set_shader_buffers callbackAlyssa Rosenzweig2019-08-012-0/+18
| | | | | | | Just copy over the passed SSBO for now. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* virgl: Enable depth_clamp by lowering if the host is new enough.Gert Wollny2019-08-012-1/+8
| | | | | Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Reviewed-by: Marek Olšák <[email protected]>
* Revert "softpipe: Don't draw when rasterizer_discard is set"Gert Wollny2019-08-011-3/+0
| | | | | | | | | This was too aggressive and breaks TF (Ilia) This reverts commit 4ee638cd7826e8a4bed76f51c7b73395a2fcdbbc. Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* iris: Skip emitting 3DSTATE_INDEX_BUFFER if possibleKenneth Graunke2019-07-313-11/+27
| | | | | | | We were emitting 3DSTATE_INDEX_BUFFER on every indexed draw, even if back-to-back draws referred to the same index buffer. This improves drawoverhead scores in the DrawElements cases by about 10%, by giving us even more minimal batches.
* lima: enable lower_bitops in ppirErico Nunes2019-07-311-0/+1
| | | | | | | | | The mali pp doesn't support integers and some nir_algebraic optimizations may result in ops that are not easily lowerable to floats, so disable optimizations resulting in bitops. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Jonathan Marek <[email protected]>
* nir/algebraic: rename lower_bitshift to lower_bitopsErico Nunes2019-07-312-2/+2
| | | | | | | | | | | | | Optimizations that insert bitshift or bitwise operations should not be applied on GPUs that don't support integer operations. The .lower_bitshift could be used to control the bitshift related ones, but there was also one bitwise optimization uncovered. Since only lima and freedreno use this option and the use case is that no bit operations are wanted, let's rename it to .lower_bitops and use it to control all bitops related optimizations. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Jonathan Marek <[email protected]>
* lima/ppir: lower fdot in nir_opt_algebraicErico Nunes2019-07-315-80/+5
| | | | | | | | | Now that we have fsum in nir, we can move fdot lowering there. This helps reduce ppir complexity and enables the lowered ops to be part of other nir optimizations in the optimization loop. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: refactor texture code to simplify schedulerErico Nunes2019-07-315-60/+7
| | | | | | | | | | | | | | | | | | | The 'varying fetch' pp instruction deals only with coordinates, and 'texture fetch' deals only with the sampler index. Previously it was not possible to clearly map ppir_op_load_coords and ppir_op_load_texture to pp instructions as the source coordinates were kept in the ppir_op_load_texture node, making this harder to maintain. The refactor is made with the attempt to clearly map ppir_op_load_coords to the 'varying fetch' and ppir_op_load_texture to the 'texture fetch'. The coordinates are still temporarily kept in the ppir_op_load_texture node as nir has both sampler and coordinates in a single instruction and it is only possible to output one ppir node during emit. But now after lowering, the sources are transferred to the (always) created ppir_op_load_coords node, and it should be possible to directly map them to their pp instructions from there onwards. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: lower texture projectionErico Nunes2019-07-311-0/+5
| | | | | | | | | | | | | | | | | | | | | | Lower texture projection in ppir using nir_lower_tex and nir_lower_tex. This will insert a mul with the coordinate division before the load varying. Even though the lima pp supports projection in the load varying instruction while loading the coordinates (from a register or a varying), it requires that both the coordinates and projector be components in a single register. nir currently handles them in separate ssa, and attempting to merge them manually may end up in worse code than just doing the coordinate division manually. So for now let's just lower the projection to add support for it in lima. In the future, an optimization pass may be implemented in lima to ensure that both coords and projector come in the same register, then this lowering may be disabled and in this case lima may use the built-in projection and save the mul instruction from lowering. Signed-off-by: Erico Nunes <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* panfrost: Add MALI_SAMP_NORM_COORDS flagAlyssa Rosenzweig2019-07-311-3/+2
| | | | | | | Corresponds to the normalized coordinates? flag on images in OpenCL and evidently also shows up in GL, so let's wire it in. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Simplify filter_mode definitionAlyssa Rosenzweig2019-07-311-24/+10
| | | | | | | It's just a bit field containing some flags; there's no need for all the macro magic. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* gallium: add AYUV and XYUV formatsMike Blumenkrantz2019-07-311-0/+2
| | | | | | this only adds the PIPE_FORMAT members, not any direct handling for them Reviewed-by: Kenneth Graunke <[email protected]>
* virgl: make use of local variableEric Engestrom2019-07-311-1/+1
| | | | | | | | Otherwise that variable is only used in an assert() and would need an ASSERTED to avoid the warning. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* tree-wide: replace MAYBE_UNUSED with ASSERTEDEric Engestrom2019-07-3122-38/+38
| | | | | | Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* r600: replace MAYBE_UNUSED with specific #ifdefEric Engestrom2019-07-311-2/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* v3d: replace MAYBE_UNUSED with UNUSEDEric Engestrom2019-07-312-5/+5
| | | | | | | | MAYBE_UNUSED is going away, so let's replace legitimate uses of it with UNUSED, which the former aliased to so far anyway. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* v3d: drop incorrect MAYBE_UNUSEDEric Engestrom2019-07-311-2/+2
| | | | | | | While at it, use that `screen` variable everywhere. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* r600: move variable to proper scopeEric Engestrom2019-07-311-2/+1
| | | | | | | It helps show when it's actually used. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-20 22:46:17 +0000